diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-09-17 01:16:20 -0500 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 07:05:37 +0100 |
commit | b241f57de543a5837ed12889dd1cc417de705967 (patch) | |
tree | 89be782ddb446166b9d84c4be256e6a011d2b9d1 /src/mainboard/asrock/939a785gmh | |
parent | e702be692b438843c94a8dcd314f0891f2743224 (diff) |
arm64: add smc layer to secmon
In order to process PSCI commands SMC instructions need to be
serviced. Provide a simple way for users of SMC to register their
handlers by function.
The SMC layer hooks into the exception processing, however it only
processes AARCH64 SMC calls. All others are ignored.
BUG=chrome-os-partner:32112
BRANCH=None
TEST=Added nop smc call to depthcharge. SMC handled and continue booting
to kernel.
Change-Id: I378f13c29220ff9f37040f094bf9cfb69259af0c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 76d2febc50397348b68d38532b8f37e2b3cf6a30
Original-Change-Id: Ieaa29fa883b9f9d55fc62ba92a1d45452296efa4
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218846
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9092
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/asrock/939a785gmh')
0 files changed, 0 insertions, 0 deletions