Artec Group dbe61 mainboard support.

Now uses CAR.
New code for SPD-less memory implementation.
Updated IRQ routing.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2728 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 22 insertions, 8 deletions

diff --git a/src/mainboard/artecgroup/dbe61/mainboard.c b/src/mainboard/artecgroup/dbe61/mainboard.c
index 0476400de0..ba60b53f64 100644
--- a/src/mainboard/artecgroup/dbe61/mainboard.c
+++ b/src/mainboard/artecgroup/dbe61/mainboard.c
@@ -1,3 +1,22 @@
+/*
+* This file is part of the LinuxBIOS project.
+*
+* Copyright (C) 2007 Advanced Micro Devices
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+*/
+
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -6,20 +25,15 @@
 #include <arch/io.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/lxdef.h>
+#include "../../../southbridge/amd/cs5536/cs5536.h"
 #include "chip.h"
 
-#define DIVIL_LBAR_GPIO		0x5140000c
-
 static void init_gpio()
 {
 	msr_t msr;
-	printk_debug("Initializing GPIO module...\n");
+	printk_debug("Checking GPIO module...\n");
 
-	// initialize the GPIO LBAR
-	msr.lo = GPIO_BASE;
-	msr.hi = 0x0000f001;
-	wrmsr(DIVIL_LBAR_GPIO, msr);
-	msr = rdmsr(DIVIL_LBAR_GPIO);
+	msr = rdmsr(MDD_LBAR_GPIO);
 	printk_debug("DIVIL_LBAR_GPIO set to 0x%08x 0x%08x\n", msr.hi, msr.lo);
 }