diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-07-19 04:28:22 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-07-19 04:28:22 +0000 |
commit | 9b4336cf418d22551bea09d93e1cee79281b110e (patch) | |
tree | 3f1e24216c11918644a98fd1e46e2fdb40fd12fe /src/mainboard/arima/hdama/failover.c | |
parent | fe4414587a4466b848184b8837d4c5a280949824 (diff) |
- Major cleanup of the bootpath
- Changes to allow more code to be compiled both ways
- Working SMP support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/arima/hdama/failover.c')
-rw-r--r-- | src/mainboard/arima/hdama/failover.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/src/mainboard/arima/hdama/failover.c b/src/mainboard/arima/hdama/failover.c index 017b03862f..8eeeaef7e1 100644 --- a/src/mainboard/arima/hdama/failover.c +++ b/src/mainboard/arima/hdama/failover.c @@ -2,22 +2,37 @@ #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> +#include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" +#include "cpu/p6/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" static void main(void) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); + enumerate_ht_chain(0); /* Setup the 8111 */ amd8111_enable_rom(); - if (do_normal_boot()) { - /* Jump to the normal image */ + /* Is this a cpu reset? */ + if (cpu_init_detected()) { + if (last_boot_normal()) { + asm("jmp __normal_image"); + } else { + asm("jmp __cpu_reset"); + } + } + /* Is this a secondary cpu? */ + else if (!boot_cpu() && last_boot_normal()) { + asm("jmp __normal_image"); + } + /* This is the primary cpu how should I boot? */ + else if (do_normal_boot()) { asm("jmp __normal_image"); } } |