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authorKeith Hui <buurin@gmail.com>2023-08-22 17:36:56 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-11-13 20:30:57 +0000
commit940fe080bf1ed2dac827b569c70fb0ea11496041 (patch)
tree8067f0072aded6f00a221cf2835b3396e21ec071 /src/mainboard/apple
parent1e9601c5ef80a5b2eea52e512c7933e2daebd337 (diff)
mb/apple/macbookair4_2: Correctly implement SPD mapping the Haswell way
While converting this board to provide SPD info using the Haswell API, it was discovered that its SPD setup was not correct to begin with. For a board that only has soldered down memory with SPD data in CBFS, it didn't enable HAVE_SPD_IN_CBFS in Kconfig. It also duplicated one set of SPD data with deliberate gaps in between. It worked its dark magic within mainboard_get_spd(), which is going away as a callback. Add HAVE_SPD_IN_CBFS to mainboard Kconfig, recreate the one set of SPD data as a hex dump same as other boards, and hook everything back up with Haswell-style mb_get_spd_map(). Recreated SPD data was extracted from abuild-built binary and manually verified for correctness against existing spd.bin (which will be removed in a follow-up). Change-Id: I906c49f6d1949f830828530edc0298b1b22ec04d Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76995 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/apple')
-rw-r--r--src/mainboard/apple/macbookair4_2/Kconfig1
-rw-r--r--src/mainboard/apple/macbookair4_2/Makefile.inc4
-rw-r--r--src/mainboard/apple/macbookair4_2/early_init.c17
-rw-r--r--src/mainboard/apple/macbookair4_2/spd/apple.spd.hex32
4 files changed, 39 insertions, 15 deletions
diff --git a/src/mainboard/apple/macbookair4_2/Kconfig b/src/mainboard/apple/macbookair4_2/Kconfig
index 5e8b1e02ab..10ed82d6df 100644
--- a/src/mainboard/apple/macbookair4_2/Kconfig
+++ b/src/mainboard/apple/macbookair4_2/Kconfig
@@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_LIBGFXINIT
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
+ select HAVE_SPD_IN_CBFS
config MAINBOARD_DIR
default "apple/macbookair4_2"
diff --git a/src/mainboard/apple/macbookair4_2/Makefile.inc b/src/mainboard/apple/macbookair4_2/Makefile.inc
index 36e42581cf..defa3ec3ce 100644
--- a/src/mainboard/apple/macbookair4_2/Makefile.inc
+++ b/src/mainboard/apple/macbookair4_2/Makefile.inc
@@ -4,9 +4,7 @@ bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-y += gnvs.c
-cbfs-files-y += spd.bin
-spd.bin-file := spd.bin
-spd.bin-type := spd
+SPD_SOURCES = apple
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
bootblock-y += early_init.c
diff --git a/src/mainboard/apple/macbookair4_2/early_init.c b/src/mainboard/apple/macbookair4_2/early_init.c
index 7e2ec1be07..fc4b215344 100644
--- a/src/mainboard/apple/macbookair4_2/early_init.c
+++ b/src/mainboard/apple/macbookair4_2/early_init.c
@@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <string.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <northbridge/intel/sandybridge/raminit.h>
#include <southbridge/intel/bd82x6x/pch.h>
-#include <cbfs.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 }, /* USB HUB 1 */
@@ -22,14 +20,9 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 0, 0, -1 }, /* Unused */
};
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+void mb_get_spd_map(struct spd_info *spdi)
{
- void *spd_file;
- size_t spd_file_len = 0;
- spd_file = cbfs_map("spd.bin", &spd_file_len);
- if (spd_file && spd_file_len >= 1024) {
- int i;
- for (i = 0; i < 4; i++)
- memcpy(&spd[i], spd_file + 256 * i, 128);
- }
+ spdi->addresses[0] = SPD_MEMORY_DOWN;
+ spdi->addresses[2] = SPD_MEMORY_DOWN;
+ spdi->spd_index = 0;
}
diff --git a/src/mainboard/apple/macbookair4_2/spd/apple.spd.hex b/src/mainboard/apple/macbookair4_2/spd/apple.spd.hex
new file mode 100644
index 0000000000..92ccbcc6cd
--- /dev/null
+++ b/src/mainboard/apple/macbookair4_2/spd/apple.spd.hex
@@ -0,0 +1,32 @@
+92 11 0b 03 03 00 00 01
+03 52 01 08 0c 00 20 00
+6c 78 6c 30 6c 11 20 81
+04 05 3c 3c 00 f0 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 65 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 b0 59
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00