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authorMario Scheithauer <mario.scheithauer@siemens.com>2017-09-18 17:08:48 +0200
committerAaron Durbin <adurbin@chromium.org>2017-09-21 14:47:42 +0000
commit841416f6f8318f65982c29d376fce2e810045b8d (patch)
treeb4adec1b0370ec4acdb9771984b30fd9c9dac0e8 /src/mainboard/aopen/dxplplusu/bus.h
parent09703f64940a66345f27d28c0e339c7ac1864b54 (diff)
soc/intel/apollolake: Make SCI configurable
The System Control Interrupt is routed per default to IRQ 9. Some mainboards use IRQ 9 for different purpose. Therefore it is necessary to make the SCI configurable on Apollo Lake. Change-Id: Ib4a7ce7d68a6f1f16f27d0902d83dc8774e785b1 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/21584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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