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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2011-11-03 15:22:01 +0200 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-03-08 14:26:24 +0100 |
commit | 91162705a65e87c56d9fc58edfe597140d1b4d53 (patch) | |
tree | e549c88e3aa264f3817ae4efc7e0a2ca72394cf9 /src/mainboard/aopen/dxplplusu/acpi/scsi.asl | |
parent | c5fc7db3559e080858461b724251f87be6faa2cd (diff) |
Add support for A-Open DXPL Plus-U motherboard
This is an old (pre-2005) entry-level server mainboard. The code
is adapted from mainboard/intel/xe7501devkit.
Featured chips:
- Dual socket604
- E7505 northbridge
- 82801DB southbridge (with EHCI debug port)
- 82870p2 PCI-X bridge
- LPC47M102S-MC super-io
- 512kB FWH flash (flashrom does the job well)
What works:
- Dual-Xeon P4/HT boot with microcode update
- RAM: registered ECC DDR266 in dual-channel
- PCI-X slot interrupts with ACPI and I/O apic
- On-board PCI-X GbE and SCSI
- ACPI power-off and wakeup with PME#
Notes :
- Current ACPI is more or less a mess
- Interrupts do not route correctly with PIRQ
- MP-table is not implemented
- Issues with reboots remain (cold and warm)
- Many superio devices are disabled by default
- Audio codec is not investigated
Change-Id: I02d18c83f485a09ada65dde03bcc86e9163f2011
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/303
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/aopen/dxplplusu/acpi/scsi.asl')
-rw-r--r-- | src/mainboard/aopen/dxplplusu/acpi/scsi.asl | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/src/mainboard/aopen/dxplplusu/acpi/scsi.asl b/src/mainboard/aopen/dxplplusu/acpi/scsi.asl new file mode 100644 index 0000000000..7215a33308 --- /dev/null +++ b/src/mainboard/aopen/dxplplusu/acpi/scsi.asl @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Kyösti Mälkki <kyosti.malkki@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* PCI-X devices 04:04.0 and 04:04.1 : AIC-7902W + * U320 SCSI dual-channel controller + */ + +Device (SCS0) +{ + Name (_ADR, 0x00040000) + OperationRegion (SCSC, PCI_Config, 0x00, 0x0100) + Field (SCSC, ByteAcc, NoLock, Preserve) + { + Offset (0x2C), SID, 32, + Offset (0xE0), PMC, 8, + Offset (0xFF), IDW, 8 + } +} + +Device (SCS1) +{ + Name (_ADR, 0x00040001) + OperationRegion (SCSC, PCI_Config, 0x00, 0x0100) + Field (SCSC, ByteAcc, NoLock, Preserve) + { + Offset (0x2C), SID, 32, + Offset (0xE0), PMC, 8, + Offset (0xFF), IDW, 8 + } +} + +#if 0 +/* Set subsystem id for both SCSI devices. + * It may require some delay on wake-up before this can be done. + */ + Method ( ) + { + Or (\_SB.PCI0.HLIB.P64A.SCS0.IDW, 0x01, \_SB.PCI0.HLIB.P64A.SCS0.IDW) + Store (0x1106A0A0, \_SB.PCI0.HLIB.P64A.SCS0.SID) + And (\_SB.PCI0.HLIB.P64A.SCS0.IDW, 0xFE, \_SB.PCI0.HLIB.P64A.SCS0.IDW) + + Or (\_SB.PCI0.HLIB.P64A.SCS1.IDW, 0x01, \_SB.PCI0.HLIB.P64A.SCS1.IDW) + Store (0x1106A0A0, \_SB.PCI0.HLIB.P64A.SCS1.SID) + And (\_SB.PCI0.HLIB.P64A.SCS1.IDW, 0xFE, \_SB.PCI0.HLIB.P64A.SCS1.IDW) + } +#endif + |