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authorFelix Held <felix-coreboot@felixheld.de>2021-04-02 00:53:48 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-04-07 22:49:58 +0000
commit691fd183c001f1110cd7ac289f4533a712dafc7a (patch)
tree9a41de7d89aaccc92099c75a5513ccf9966cf945 /src/mainboard/amd
parent6478cf9702946016c235d1267fba76254cb906a1 (diff)
mb/amd/majolica: add PCIe devices to devicetree
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I838aeda2e6c403eaa3388a6b934e7ab6b4e918e3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52045 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/majolica/devicetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb
index 5efe709ad0..088b259261 100644
--- a/src/mainboard/amd/majolica/devicetree.cb
+++ b/src/mainboard/amd/majolica/devicetree.cb
@@ -15,6 +15,13 @@ chip soc/amd/cezanne
}"
device domain 0 on
+ device ref gpp_gfx_bridge_0 on end # MXM
+ device ref gpp_bridge_0 on end # NVMe
+ device ref gpp_bridge_1 on end
+ device ref gpp_bridge_2 on end # WWAN
+ device ref gpp_bridge_3 on end # LAN
+ device ref gpp_bridge_4 on end # WLAN
+ device ref gpp_bridge_5 on end
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)
device ref xhci_0 on # USB 3.1 (USB0)