diff options
| author | Martin Roth <martin@coreboot.org> | 2021-10-01 14:37:30 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-10-05 18:06:52 +0000 |
| commit | 50863daef8ed75c0cb3dfd375e7622c898de5821 (patch) | |
| tree | cbb2dea518524f8c9ce5edca5d57132ca9705086 /src/mainboard/amd | |
| parent | 0949e739066c3509e05db2b9ed71cefaaa62205f (diff) | |
src/mainboard to src/security: Fix spelling errors
These issues were found and fixed by codespell, a useful tool for
finding spelling errors.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ie34003a9fdfe9f3b1b8ec0789aeca8b9435c9c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/bilby/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mandolin/variants/cereme/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb index 6ecdaf4910..c3ba99c905 100644 --- a/src/mainboard/amd/bilby/devicetree.cb +++ b/src/mainboard/amd/bilby/devicetree.cb @@ -127,7 +127,7 @@ chip soc/amd/picasso .flash_ch_en = 0, }" - # genral purpose PCIe clock output configuration + # general purpose PCIe clock output configuration register "gpp_clk_config[0]" = "GPP_CLK_OFF" register "gpp_clk_config[1]" = "GPP_CLK_OFF" register "gpp_clk_config[2]" = "GPP_CLK_REQ" diff --git a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb index 6342c29f66..167c3667ab 100644 --- a/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/cereme/devicetree.cb @@ -118,7 +118,7 @@ chip soc/amd/picasso .flash_ch_en = 0, }" - # genral purpose PCIe clock output configuration + # general purpose PCIe clock output configuration register "gpp_clk_config[0]" = "GPP_CLK_REQ" register "gpp_clk_config[1]" = "GPP_CLK_REQ" register "gpp_clk_config[2]" = "GPP_CLK_REQ" diff --git a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb index 035bb7015b..1bc5498e3c 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb +++ b/src/mainboard/amd/mandolin/variants/mandolin/devicetree.cb @@ -118,7 +118,7 @@ chip soc/amd/picasso .flash_ch_en = 0, }" - # genral purpose PCIe clock output configuration + # general purpose PCIe clock output configuration register "gpp_clk_config[0]" = "GPP_CLK_REQ" register "gpp_clk_config[1]" = "GPP_CLK_REQ" register "gpp_clk_config[2]" = "GPP_CLK_REQ" |