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authorMartin Roth <gaumless@gmail.com>2015-01-06 21:09:57 -0700
committerMartin Roth <gaumless@gmail.com>2015-01-09 06:05:19 +0100
commitc62ee70b6ef651288c4c4710319ee313b28fd520 (patch)
tree7c320594e43b828141b448ae9ce5bdb616d64e2e /src/mainboard/amd
parent2507820bd9f3c868e79b28f3b4e5ed199b3e62dd (diff)
src/mainboard: Doxygen fixes
- Remove @param command for #define - this isn't valid. - Rename duplicate @section names - All of the renamed @sections have other @section names in the same file. - Remove blank @brief and @param commands - Doxygen seems to REALLY dislike this... - Add a missing @param name. Change-Id: Iba99ec68b37bbb5c375b7256363d16228031d771 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/8175 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/torpedo/Oem.h2
-rw-r--r--src/mainboard/amd/torpedo/platform_cfg.h18
2 files changed, 6 insertions, 14 deletions
diff --git a/src/mainboard/amd/torpedo/Oem.h b/src/mainboard/amd/torpedo/Oem.h
index 915182e05d..f0788584a6 100644
--- a/src/mainboard/amd/torpedo/Oem.h
+++ b/src/mainboard/amd/torpedo/Oem.h
@@ -34,8 +34,6 @@
/**
* PCIEX_BASE_ADDRESS - Define PCIE base address
- *
- * @param[Option] MOVE_PCIEBAR_TO_F0000000 Set PCIe base address to 0xF7000000
*/
#ifdef MOVE_PCIEBAR_TO_F0000000
#define PCIEX_BASE_ADDRESS 0xF7000000
diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h
index 311214cbd8..6ff1476550 100644
--- a/src/mainboard/amd/torpedo/platform_cfg.h
+++ b/src/mainboard/amd/torpedo/platform_cfg.h
@@ -128,7 +128,7 @@
// #endif
/**
- * @section GecShadowRomBase
+ * @section GecShadowRomAddress
*/
#ifndef GEC_ROM_SHADOW_ADDRESS
#define GEC_ROM_SHADOW_ADDRESS 0xFED61000
@@ -191,7 +191,7 @@
// #endif
/**
- * @section SataController
+ * @section InChipSataController
* @li <b>0</b> - Disable
* @li <b>1</b> - Enable
*/
@@ -200,7 +200,7 @@
#endif
/**
- * @section SataIdeCombMdPriSecOpt
+ * @section SataIdeCombModeChannel
* @li <b>0</b> - Primary
* @li <b>1</b> - Secondary<TD></TD>
* Sata Controller set as primary or
@@ -221,7 +221,7 @@
#endif
/**
- * @section SataIdeCombinedMode
+ * @section SataCombineMode
* @li <b>0</b> - Disable
* @li <b>1</b> - Enable
* Sata IDE Controller set to Combined Mode
@@ -738,12 +738,6 @@
#define IDE_DISUNUSED_IDE_S_CHANNEL 0
/**
- * @section IdeDisUnusedIdeSChannel
- * @li <b>0</b> - Disable
- * @li <b>1</b> - Enable
- */
-
-/**
* @section SataEspPort0
* @li <b>0</b> - Disable
* @li <b>1</b> - Enable
@@ -1219,10 +1213,10 @@ void SbPowerOnInit_Config(AMDSBCFG *sb_cfg);
*
* @param[in] func Southbridge CIMx Function ID.
* @param[in] data Southbridge Input Data.
- * @param[in] sb_cfg Southbridge configuration structure pointer.
+ * @param[in] config Southbridge configuration structure pointer.
*
*/
-u32 sb900_callout_entry(u32 func, u32 data, void* sb_cfg);
+u32 sb900_callout_entry(u32 func, u32 data, void* config);
// definition for function in gpio.c
void gpioEarlyInit (void);