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authorLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:26:01 +0000
committerLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:26:01 +0000
commit05c0869fac22cae8a35897310fef64ad94caed01 (patch)
tree5cb65c177147d9859f729f8da4cfa415b3717352 /src/mainboard/amd
parent37784b429dc687fda68e2e779b01145e2c6d3bff (diff)
boot to kernel
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/rumba/Config.lb32
-rw-r--r--src/mainboard/amd/rumba/auto.c31
2 files changed, 18 insertions, 45 deletions
diff --git a/src/mainboard/amd/rumba/Config.lb b/src/mainboard/amd/rumba/Config.lb
index f08593143f..a7962f51d0 100644
--- a/src/mainboard/amd/rumba/Config.lb
+++ b/src/mainboard/amd/rumba/Config.lb
@@ -124,20 +124,22 @@ dir /pc80
config chip.h
chip northbridge/amd/gx2
- device pci_domain 0 on
- device pci 0.0 on end
- chip southbridge/amd/cs5535
- device pci 12.0 on
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 off end # Audio
- device pci 12.4 off end # VGA
- end
- end
- end
-
- chip cpu/amd/model_gx2
- end
-
+ device apic_cluster 0 on
+ chip cpu/amd/model_gx2
+ device apic 0 on end
+ end
+ end
+ device pci_domain 0 on
+ device pci 1.0 on end
+ device pci 1.1 on end
+ chip southbridge/amd/cs5536
+ device pci d.0 on end # Realtek 8139 LAN
+ device pci f.0 on end # ISA Bridge
+ device pci f.2 on end # IDE Controller
+ device pci f.3 on end # Audio
+ device pci f.4 on end # OHCI
+ device pci f.4 on end # UHCI
+ end
+ end
end
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index 3f966047ca..7dca7fc55d 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -108,39 +108,14 @@ static void msr_init(void)
__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
__builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
- //__builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
- //__builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
- //__builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
- //__builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
-
- // __builtin_wrmsr(0x10000080, 0x3, 0x0);
__builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
__builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
- //__builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
- //__builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
- //__builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
- //__builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
-
-
- //__builtin_wrmsr(0x50002001, 0x27, 0x0);
- //__builtin_wrmsr(0x4c002001, 0x1, 0x0);
-#if 1
- //__builtin_wrmsr(0x4c00000c, 0x0, 0x08);
- //__builtin_wrmsr(0x4c000016, 0x0, 0x0);
- //__builtin_wrmsr(0x4c00000c, 0x1, 0x0);
- //__builtin_wrmsr(0x4c00005e, 0x03880000, 0x00);
- //__builtin_wrmsr(0x4c00006f, 0x0000f000, 0x00);
- //__builtin_wrmsr(0x4c00005f, 0x08000000, 0x00);
- //__builtin_wrmsr(0x4c00000d, 0x82b5ad68, 0x80ad6b57);
- //__builtin_wrmsr(0x4c00000c, 0x0, 0x0);
-#endif
}
static void main(unsigned long bist)
{
- msr_t msr;
static const struct mem_controller memctrl [] = {
{.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
};
@@ -152,7 +127,7 @@ static void main(unsigned long bist)
uart_init();
console_init();
- cs5535_early_setup();
+ cs5536_early_setup();
pll_reset();
@@ -161,10 +136,6 @@ static void main(unsigned long bist)
sdram_initialize(1, memctrl);
- print_err("reading MSR 0x51102000\n\t");
- msr = rdmsr(0x51102000);
- print_debug_hex32(msr.hi);
-
/* Check all of memory */
//ram_check(0x00000000, 640*1024);
}