AGESA f14/f15tn/f16kb: Factor out AGESA_VERSION_STRING

We use the same AGESA version numbers on all but one mainboard, so we
might as well factor them out. The only exception is asrock/e350m1,
which has the f15tn/f16kb version number even though it actually uses
AGESA f14. To preserve reproducibility, do not change it in this commit.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: I0dad2352ccda454d5545f17228d52e4ff4f23f20
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41591
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

7 files changed, 0 insertions, 28 deletions

diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c
index 18a5ac9c04..f56a03dac4 100644
--- a/src/mainboard/amd/inagua/buildOpts.c
+++ b/src/mainboard/amd/inagua/buildOpts.c
@@ -216,10 +216,6 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-// This is the release version number of the AGESA component
-// This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING	{'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY				200 ///< DDR 400
 #define DDR533_FREQUENCY				266 ///< DDR 533
diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c
index 4a9d759f8c..dfcb46508a 100644
--- a/src/mainboard/amd/olivehill/buildOpts.c
+++ b/src/mainboard/amd/olivehill/buildOpts.c
@@ -225,10 +225,6 @@ CONST AP_MTRR_SETTINGS ROMDATA KabiniApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-                  // This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING  {'V', '0', '.', '0', '.', '0', '.', '1', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 //#define DDR400_FREQUENCY   200     ///< DDR 400
 //#define DDR533_FREQUENCY   266     ///< DDR 533
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index 81d777a471..e1c71c366e 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -227,10 +227,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-                  // This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING  {'V', '0', '.', '0', '.', '0', '.', '1', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY   200     ///< DDR 400
 #define DDR533_FREQUENCY   266     ///< DDR 533
diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c
index f0c5761c0a..3066cea0ae 100644
--- a/src/mainboard/amd/persimmon/buildOpts.c
+++ b/src/mainboard/amd/persimmon/buildOpts.c
@@ -216,10 +216,6 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-// This is the release version number of the AGESA component
-// This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING	{'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY				200 ///< DDR 400
 #define DDR533_FREQUENCY				266 ///< DDR 533
diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c
index c83af3900e..9eac2cf3d7 100644
--- a/src/mainboard/amd/south_station/buildOpts.c
+++ b/src/mainboard/amd/south_station/buildOpts.c
@@ -216,10 +216,6 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-                  // This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING  {'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY              200 ///< DDR 400
 #define DDR533_FREQUENCY              266 ///< DDR 533
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index dddf1f5309..e1c3cd237c 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -227,10 +227,6 @@ CONST AP_MTRR_SETTINGS ROMDATA TrinityApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-                  // This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING  {'V', '0', '.', '0', '.', '0', '.', '1', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY   200     ///< DDR 400
 #define DDR533_FREQUENCY   266     ///< DDR 533
diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c
index c83af3900e..9eac2cf3d7 100644
--- a/src/mainboard/amd/union_station/buildOpts.c
+++ b/src/mainboard/amd/union_station/buildOpts.c
@@ -216,10 +216,6 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-                  // This is the release version number of the AGESA component
-                  // This string MUST be exactly 12 characters long
-#define AGESA_VERSION_STRING  {'V', '1', '.', '1', '.', '0', '.', '3', ' ', ' ', ' ', ' '}
-
 /* MEMORY_BUS_SPEED */
 #define DDR400_FREQUENCY              200 ///< DDR 400
 #define DDR533_FREQUENCY              266 ///< DDR 533