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authorFelix Held <felix-coreboot@felixheld.de>2022-02-11 17:19:37 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-12 16:58:38 +0000
commit514965a9ce2ea698e6a67d3b7dd38e98381e3699 (patch)
tree61ec184077581bce1125036562f30233fe68a181 /src/mainboard/amd
parentaa3a42df440708046cc13d242c3fce61c4be3660 (diff)
mb/amd/majolica/mainboard: add initial IRQ routing
This IRQ routing info is taken from mb/google/guybrush. The IRQ routing on Chausie that was a 1:1 copy caused some issues with the I2C driver, so port the Chausie IRQ mapping change back to Majolica. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ieb958639dd8aef7c60c050ad107dde7d1cd6a8bd Reviewed-on: https://review.coreboot.org/c/coreboot/+/61867 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/majolica/mainboard.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c
index 296402fefb..199cf4702e 100644
--- a/src/mainboard/amd/majolica/mainboard.c
+++ b/src/mainboard/amd/majolica/mainboard.c
@@ -36,23 +36,25 @@ static const struct fch_irq_routing {
uint8_t pic_irq_num;
uint8_t apic_irq_num;
} majolica_fch[] = {
- { PIRQ_A, PIRQ_NC, PIRQ_NC },
- { PIRQ_B, PIRQ_NC, PIRQ_NC },
- { PIRQ_C, PIRQ_NC, PIRQ_NC },
- { PIRQ_D, PIRQ_NC, PIRQ_NC },
- { PIRQ_E, PIRQ_NC, PIRQ_NC },
- { PIRQ_F, PIRQ_NC, PIRQ_NC },
- { PIRQ_G, PIRQ_NC, PIRQ_NC },
- { PIRQ_H, PIRQ_NC, PIRQ_NC },
+ { PIRQ_A, 12, PIRQ_NC },
+ { PIRQ_B, 14, PIRQ_NC },
+ { PIRQ_C, 15, PIRQ_NC },
+ { PIRQ_D, 12, PIRQ_NC },
+ { PIRQ_E, 14, PIRQ_NC },
+ { PIRQ_F, 15, PIRQ_NC },
+ { PIRQ_G, 12, PIRQ_NC },
+ { PIRQ_H, 14, PIRQ_NC },
{ PIRQ_SCI, ACPI_SCI_IRQ, ACPI_SCI_IRQ },
{ PIRQ_SD, PIRQ_NC, PIRQ_NC },
{ PIRQ_SDIO, PIRQ_NC, PIRQ_NC },
{ PIRQ_SATA, PIRQ_NC, PIRQ_NC },
{ PIRQ_EMMC, PIRQ_NC, PIRQ_NC },
- { PIRQ_GPIO, 7, 7 },
- { PIRQ_I2C2, PIRQ_NC, PIRQ_NC },
- { PIRQ_I2C3, PIRQ_NC, PIRQ_NC },
+ { PIRQ_GPIO, 11, 11 },
+ { PIRQ_I2C0, 10, 10 },
+ { PIRQ_I2C1, 7, 7 },
+ { PIRQ_I2C2, 6, 6 },
+ { PIRQ_I2C3, 5, 5 },
{ PIRQ_UART0, 4, 4 },
{ PIRQ_UART1, 3, 3 },