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authorRonald G. Minnich <rminnich@gmail.com>2006-04-13 19:44:50 +0000
committerRonald G. Minnich <rminnich@gmail.com>2006-04-13 19:44:50 +0000
commitea9db56d0e78499faf38a5d8e0c2125275c69ef2 (patch)
tree95b8fa90f043258d1024a592794c6c8f31706cdf /src/mainboard/amd
parentd8d8fffa0edc8b86f1efab2f3a44c9d53cefe556 (diff)
add SystemPreInit() and support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd')
-rw-r--r--src/mainboard/amd/rumba/auto.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index dae503b696..ac9c2e5222 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -101,7 +101,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl)
#define PLLMSRlo2 ((1<<14) |(1<<13) | (1<<0))
#include "northbridge/amd/gx2/pll_reset.c"
#include "cpu/amd/model_gx2/cpureginit.c"
-
+#include "cpu/amd/model_gx2/syspreinit.c"
static void msr_init(void)
{
__builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02);
@@ -144,6 +144,7 @@ static void main(unsigned long bist)
{.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
};
+ SystemPreInit();
msr_init();
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);