eric patch

        1. x86_setup_mtrr take address bit.
        2. generic ht, pcix, pcie beidge...
        3. scan bus and reset_bus
        4. ht read ctrl to decide if the ht chain
           is ready
        5. Intel e7520 and e7525 support
        6. new ich5r support
        7. intel sb 6300 support.

yhlu patch
	1. split x86_setup_mtrrs to fixed and var
	2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
	3. in_conherent.c K8_SCAN_PCI_BUS


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 21 insertions, 30 deletions

diff --git a/src/mainboard/amd/quartet/Config.lb b/src/mainboard/amd/quartet/Config.lb
index 2d818d40d1..5adaf354d7 100644
--- a/src/mainboard/amd/quartet/Config.lb
+++ b/src/mainboard/amd/quartet/Config.lb
@@ -41,6 +41,7 @@ arch i386 end
 driver mainboard.o
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
+object reset.o
 
 ##
 ## Romcc output
diff --git a/src/mainboard/amd/quartet/Options.lb b/src/mainboard/amd/quartet/Options.lb
index 7e2dc489ae..f1013eaadf 100644
--- a/src/mainboard/amd/quartet/Options.lb
+++ b/src/mainboard/amd/quartet/Options.lb
@@ -3,9 +3,6 @@ uses HAVE_PIRQ_TABLE
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
-uses HARD_RESET_BUS
-uses HARD_RESET_DEVICE
-uses HARD_RESET_FUNCTION
 uses IRQ_SLOT_COUNT
 uses HAVE_OPTION_TABLE
 uses CONFIG_MAX_CPUS
@@ -75,13 +72,6 @@ default HAVE_FALLBACK_BOOT=1
 default HAVE_HARD_RESET=1
 
 ##
-## Funky hard reset implementation
-## 
-default HARD_RESET_BUS=1
-default HARD_RESET_DEVICE=4
-default HARD_RESET_FUNCTION=0
-
-##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
diff --git a/src/mainboard/amd/quartet/reset.c b/src/mainboard/amd/quartet/reset.c
new file mode 100644
index 0000000000..63958185f6
--- /dev/null
+++ b/src/mainboard/amd/quartet/reset.c
@@ -0,0 +1,6 @@
+#include "../../../southbridge/amd/amd8111/amd8111_reset.c"
+
+void hard_reset(void)
+{
+	amd8111_hard_reset(0, 2);
+}
diff --git a/src/mainboard/amd/serenade/Config.lb b/src/mainboard/amd/serenade/Config.lb
index 4fdc235507..deac98b563 100644
--- a/src/mainboard/amd/serenade/Config.lb
+++ b/src/mainboard/amd/serenade/Config.lb
@@ -41,6 +41,7 @@ arch i386 end
 driver mainboard.o
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
+object reset.o
 
 ##
 ## Romcc output
diff --git a/src/mainboard/amd/serenade/Options.lb b/src/mainboard/amd/serenade/Options.lb
index fedc518d8a..a26f2709f8 100644
--- a/src/mainboard/amd/serenade/Options.lb
+++ b/src/mainboard/amd/serenade/Options.lb
@@ -3,9 +3,6 @@ uses HAVE_PIRQ_TABLE
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
-uses HARD_RESET_BUS
-uses HARD_RESET_DEVICE
-uses HARD_RESET_FUNCTION
 uses IRQ_SLOT_COUNT
 uses HAVE_OPTION_TABLE
 uses CONFIG_MAX_CPUS
@@ -74,13 +71,6 @@ default HAVE_FALLBACK_BOOT=1
 default HAVE_HARD_RESET=1
 
 ##
-## Funky hard reset implementation
-## 
-default HARD_RESET_BUS=1
-default HARD_RESET_DEVICE=4
-default HARD_RESET_FUNCTION=0
-
-##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
diff --git a/src/mainboard/amd/serenade/reset.c b/src/mainboard/amd/serenade/reset.c
new file mode 100644
index 0000000000..63958185f6
--- /dev/null
+++ b/src/mainboard/amd/serenade/reset.c
@@ -0,0 +1,6 @@
+#include "../../../southbridge/amd/amd8111/amd8111_reset.c"
+
+void hard_reset(void)
+{
+	amd8111_hard_reset(0, 2);
+}
diff --git a/src/mainboard/amd/solo/Config.lb b/src/mainboard/amd/solo/Config.lb
index fdf3c1c769..6feb8b1848 100644
--- a/src/mainboard/amd/solo/Config.lb
+++ b/src/mainboard/amd/solo/Config.lb
@@ -42,6 +42,7 @@ driver mainboard.o
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
 if HAVE_ACPI_TABLES object acpi_tables.o end
+object reset.o
 
 ##
 ## Romcc output
diff --git a/src/mainboard/amd/solo/Options.lb b/src/mainboard/amd/solo/Options.lb
index 42611440f6..87a2ceb4bc 100644
--- a/src/mainboard/amd/solo/Options.lb
+++ b/src/mainboard/amd/solo/Options.lb
@@ -4,9 +4,6 @@ uses HAVE_PIRQ_TABLE
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
-uses HARD_RESET_BUS
-uses HARD_RESET_DEVICE
-uses HARD_RESET_FUNCTION
 uses IRQ_SLOT_COUNT
 uses HAVE_OPTION_TABLE
 uses CONFIG_MAX_CPUS
@@ -76,13 +73,6 @@ default HAVE_FALLBACK_BOOT=1
 default HAVE_HARD_RESET=1
 
 ##
-## Funky hard reset implementation
-## 
-default HARD_RESET_BUS=1
-default HARD_RESET_DEVICE=4
-default HARD_RESET_FUNCTION=0
-
-##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
diff --git a/src/mainboard/amd/solo/reset.c b/src/mainboard/amd/solo/reset.c
new file mode 100644
index 0000000000..3db3956ec6
--- /dev/null
+++ b/src/mainboard/amd/solo/reset.c
@@ -0,0 +1,6 @@
+#include "../../../southbridge/amd/amd8111/amd8111_reset.c"
+
+void hard_reset(void)
+{
+	amd8111_hard_reset(0, 0);
+}