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authorTobias Diedrich <ranma+coreboot@tdiedrich.de>2010-11-17 16:27:06 +0000
committerRudolf Marek <r.marek@assembler.cz>2010-11-17 16:27:06 +0000
commit0fe6e9a9a4dfdabf0ad1336112207899b868ee9c (patch)
tree4170ac992ea1e6dea278e816040804742d13bc94 /src/mainboard/amd
parent8520e01af792bca95aaed332bc0cbc7116948706 (diff)
Dynamically generate PNP0C02 mainboard resources in SSDT
Updated patch with improved comments and small bugfix (use same value for min and max on io resource). While adding the area between TOM1 and 4GB to \SB.PCI0._CRS seems to be the easiest way to get both Linux and Windows happy, it is not quite correct because reserved areas like APIC, MMCONF etc. ranges need to be excluded. This is a proof of concept patch for the M2V board that dynamically creates a ResourceTemplate() containing these in the SSDT and adds a corresponding PNP0C02 device to the DSDT. All resources that have IORESOURCE_RESERVE and (IORESOURCE_MEM or IORESOURCE_IO) set are added. Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de> Added M2V-MX SE too. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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