diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-07 23:42:58 +1000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-07-08 13:54:47 +0200 |
| commit | 7974471e379e3aaefc0ecd5524c408e69537444b (patch) | |
| tree | 4b01576406def94a93142f98a4639a7244dbbd12 /src/mainboard/amd/union_station | |
| parent | 1f19d3494142bd12fa6d75f5761865346da5bcc5 (diff) | |
mainboard: Trivial - drop trailing blank lines at EOF
Change-Id: I05d6d22664155ac8478e665733f816776e277c22
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6200
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/amd/union_station')
| -rw-r--r-- | src/mainboard/amd/union_station/PlatformGnbPcie.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/union_station/buildOpts.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/union_station/romstage.c | 1 |
3 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/amd/union_station/PlatformGnbPcie.c b/src/mainboard/amd/union_station/PlatformGnbPcie.c index be1c3a58ba..aa0eedbbf5 100644 --- a/src/mainboard/amd/union_station/PlatformGnbPcie.c +++ b/src/mainboard/amd/union_station/PlatformGnbPcie.c @@ -150,4 +150,3 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; } - diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c index 87f9b8818a..f1346bd7aa 100644 --- a/src/mainboard/amd/union_station/buildOpts.c +++ b/src/mainboard/amd/union_station/buildOpts.c @@ -454,5 +454,3 @@ CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABL // /* platform code to read an SPD... */ // return Status; //} - - diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c index 0a7ef7c4b0..05acf524d6 100644 --- a/src/mainboard/amd/union_station/romstage.c +++ b/src/mainboard/amd/union_station/romstage.c @@ -113,4 +113,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x54); /* Should never see this post code. */ } - |