diff options
| author | Martin Roth <Martin@se-eng.com> | 2012-02-14 10:50:11 -0700 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2012-02-20 05:36:40 +0100 |
| commit | dc0bdbab2df7ff8c89b0e1325a60ce994ee6bf43 (patch) | |
| tree | 946f7f950e54a21837772ce05954ff890823e3e2 /src/mainboard/amd/torpedo/mainboard.c | |
| parent | da52aed20d2ee835c6c68f779b2ec1949895af87 (diff) | |
Torpedo mainboard changes to fix warnings.
Fixes the warnings generated in the torpedo mainboard build. Most of these
changes are similar to fixes already implemented in the persimmon mainboard.
Change-Id: Ib931be51c0e6448c00c8cfeb13073e1f392582a5
Signed-off-by: Martin L Roth <martin@se-eng.com>
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: http://review.coreboot.org/634
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/torpedo/mainboard.c')
| -rw-r--r-- | src/mainboard/amd/torpedo/mainboard.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c index 288798fdb2..2152153936 100644 --- a/src/mainboard/amd/torpedo/mainboard.c +++ b/src/mainboard/amd/torpedo/mainboard.c @@ -31,6 +31,9 @@ #define ONE_MB 0x100000 //#define SMBUS_IO_BASE 0x6000 +void set_pcie_reset(void); +void set_pcie_dereset(void); + /** * TODO * SB CIMx callback @@ -54,7 +57,7 @@ uint64_t uma_memory_base, uma_memory_size; *************************************************/ static void torpedo_enable(device_t dev) { - printk(BIOS_INFO, "Mainboard Torpedo Enable. dev=0x%p\n", dev); + printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable. dev=0x%p\n", dev); #if (CONFIG_GFXUMA == 1) msr_t msr, msr2; uint32_t sys_mem; @@ -79,14 +82,13 @@ static void torpedo_enable(device_t dev) * >=1G 256M * <1G 64M */ - sys_mem = msr.lo; - sys_mem = msr.lo + 16 * ONE_MB; // Ignore 16MB allocated for C6 when finding UMA size - if (sys_mem >= 2048 * ONE_MB) { - uma_memory_size = 512 * ONE_MB; - } else if (sys_mem >= 1024 * ONE_MB) { - uma_memory_size = 256 * ONE_MB; + sys_mem = msr.lo + 0x1000000; // Ignore 16MB allocated for C6 when finding UMA size + if ((msr.hi & 0x0000000F) || (sys_mem >= 0x80000000)) { + uma_memory_size = 0x20000000; /* >= 2G memory, 512M recommended UMA */ + } else if (sys_mem >= 0x40000000) { + uma_memory_size = 0x10000000; /* >= 1G memory, 256M recommended UMA */ } else { - uma_memory_size = 64 * ONE_MB; + uma_memory_size = 0x4000000; /* <1G memory, 64M recommended UMA */ } uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", @@ -114,6 +116,6 @@ int add_mainboard_resources(struct lb_memory *mem) return 0; } struct chip_operations mainboard_ops = { - CHIP_NAME("AMD TORPEDO Mainboard") + CHIP_NAME(CONFIG_MAINBOARD_VENDOR " " CONFIG_MAINBOARD_PART_NUMBER " Mainboard") .enable_dev = torpedo_enable, }; |