diff options
| author | Stefan Reinauer <stepan@openbios.org> | 2003-07-21 13:05:56 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2003-07-21 13:05:56 +0000 |
| commit | 73a9cf4ccb58eccb4a1383088f7c86f325fdad7f (patch) | |
| tree | 7617b4d10448e9576eb18a05e68efb8cfefff966 /src/mainboard/amd/quartet/failover.c | |
| parent | 8275bad6f640d0da5ead72984f1efe32e6172d7d (diff) | |
* update quartet target to latest SMP changes.
* remove dead code from coherent_ht.c
* add ldtstop code for link speed changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/quartet/failover.c')
| -rw-r--r-- | src/mainboard/amd/quartet/failover.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/src/mainboard/amd/quartet/failover.c b/src/mainboard/amd/quartet/failover.c index 017b03862f..8eeeaef7e1 100644 --- a/src/mainboard/amd/quartet/failover.c +++ b/src/mainboard/amd/quartet/failover.c @@ -2,22 +2,37 @@ #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> +#include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" +#include "cpu/p6/boot_cpu.c" +#include "northbridge/amd/amdk8/reset_test.c" static void main(void) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); + enumerate_ht_chain(0); /* Setup the 8111 */ amd8111_enable_rom(); - if (do_normal_boot()) { - /* Jump to the normal image */ + /* Is this a cpu reset? */ + if (cpu_init_detected()) { + if (last_boot_normal()) { + asm("jmp __normal_image"); + } else { + asm("jmp __cpu_reset"); + } + } + /* Is this a secondary cpu? */ + else if (!boot_cpu() && last_boot_normal()) { + asm("jmp __normal_image"); + } + /* This is the primary cpu how should I boot? */ + else if (do_normal_boot()) { asm("jmp __normal_image"); } } |