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| author | efdesign98 <efdesign98@gmail.com> | 2011-09-15 15:24:26 -0600 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2011-09-16 01:51:00 +0200 |
| commit | d7a696d0f229abccc95ff411f28d91b9b796ab74 (patch) | |
| tree | dea44c1ea548e7a9ce7139a3066e86ebda60de39 /src/mainboard/amd/persimmon/romstage.c | |
| parent | 83d59b945c677918f9fdb889b95acb2989639dfc (diff) | |
Persimmon updates for AMD F14 rev C0
These are the changes for the AMD Persimmon mainboard
required to support the update of the AMD Family 14
cpu to rev C0. There are many warning fixes; the agesa-
wrapper.c file has been changed to fix the amdinitlate
and amdlaterunaptask routines, and more.
Change-Id: I6de43379a2819cea5169db5f21d4841f9a4942a7
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/137
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/amd/persimmon/romstage.c')
| -rw-r--r-- | src/mainboard/amd/persimmon/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index 606780355b..0eb7490c6a 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -45,7 +45,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; - u8 reg8; // all cores: allow caching of flash chip code and data // (there are no cache-as-ram reliability concerns with family 14h) |