diff options
author | Frank Vibrans <frank.vibrans@amd.com> | 2011-02-14 19:04:45 +0000 |
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committer | Marc Jones <marc.jones@amd.com> | 2011-02-14 19:04:45 +0000 |
commit | 69da1b676cd3f126b27a6fd3c23c557ac1a03961 (patch) | |
tree | bf42465c4bb7e503075fe30890eb4705f9a341a4 /src/mainboard/amd/persimmon/dimmSpd.c | |
parent | 7b904d84ba4e4e40149a8dcb98ca518e3bc6b911 (diff) |
Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.
This code provides support for IBASE Technology DB-FT1 (AMD code name Persimmon) and AMD Inagua platforms. It is dependent on all other patches in this set.
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6352 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/persimmon/dimmSpd.c')
-rw-r--r-- | src/mainboard/amd/persimmon/dimmSpd.c | 166 |
1 files changed, 166 insertions, 0 deletions
diff --git a/src/mainboard/amd/persimmon/dimmSpd.c b/src/mainboard/amd/persimmon/dimmSpd.c new file mode 100644 index 0000000000..94e63e1bda --- /dev/null +++ b/src/mainboard/amd/persimmon/dimmSpd.c @@ -0,0 +1,166 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include "Porting.h" +#include "AGESA.h" +#include "amdlib.h" + +AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info); +#define DIMENSION(array)(sizeof (array)/ sizeof (array [0])) + +/*#pragma optimize ("", off) // for source level debug +*--------------------------------------------------------------------------- +* +* SPD address table - porting required +*/ + +static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm + { + // socket 0 + { + {0xA0, 0xA2}, // channel 0 dimms + {0xA4, 0xA8}, // channel 1 dimms + }, + // socket 1 + { + {0x00, 0x00}, // channel 0 dimms + {0x00, 0x00}, // channel 1 dimms + }, + }; + +/*----------------------------------------------------------------------------- + * + * readSmbusByteData - read a single SPD byte from any offset + */ + +static int readSmbusByteData (int iobase, int address, char *buffer, int offset) + { + unsigned int status; + UINT64 limit; + + address |= 1; // set read bit + + __outbyte (iobase + 0, 0xFF); // clear error status + __outbyte (iobase + 1, 0x1F); // clear error status + __outbyte (iobase + 3, offset); // offset in eeprom + __outbyte (iobase + 4, address); // slave address and read bit + __outbyte (iobase + 2, 0x48); // read byte command + + // time limit to avoid hanging for unexpected error status (should never happen) + limit = __rdtsc () + 2000000000 / 10; + for (;;) + { + status = __inbyte (iobase); + if (__rdtsc () > limit) break; + if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting + if ((status & 1) == 1) continue; // HostBusy set, keep waiting + break; + } + + buffer [0] = __inbyte (iobase + 5); + if (status == 2) status = 0; // check for done with no errors + return status; + } + +/*----------------------------------------------------------------------------- + * + * readSmbusByte - read a single SPD byte from the default offset + * this function is faster function readSmbusByteData + */ + +static int readSmbusByte (int iobase, int address, char *buffer) + { + unsigned int status; + UINT64 limit; + + __outbyte (iobase + 0, 0xFF); // clear error status + __outbyte (iobase + 2, 0x44); // read command + + // time limit to avoid hanging for unexpected error status + limit = __rdtsc () + 2000000000 / 10; + for (;;) + { + status = __inbyte (iobase); + if (__rdtsc () > limit) break; + if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting + if ((status & 1) == 1) continue; // HostBusy set, keep waiting + break; + } + + buffer [0] = __inbyte (iobase + 5); + if (status == 2) status = 0; // check for done with no errors + return status; + } + +/*--------------------------------------------------------------------------- + * + * readspd - Read one or more SPD bytes from a DIMM. + * Start with offset zero and read sequentially. + * Optimization relies on autoincrement to avoid + * sending offset for every byte. + * Reads 128 bytes in 7-8 ms at 400 KHz. + */ + +static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count) + { + int index, error; + + /* read the first byte using offset zero */ + error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0); + if (error) return error; + + /* read the remaining bytes using auto-increment for speed */ + for (index = 1; index < count; index++) + { + error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]); + if (error) return error; + } + + return 0; + } + +static void writePmReg (int reg, int data) + { + __outbyte (0xCD6, reg); + __outbyte (0xCD7, data); + } + +static void setupFch (int ioBase) + { + writePmReg (0x2D, ioBase >> 8); + writePmReg (0x2C, ioBase | 1); + writePmReg (0x29, 0x80); + writePmReg (0x28, 0x61); + __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz + } + +AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) + { + int spdAddress, ioBase; + + if (info->SocketId >= DIMENSION (spdAddressLookup )) return AGESA_ERROR; + if (info->MemChannelId >= DIMENSION (spdAddressLookup[0] )) return AGESA_ERROR; + if (info->DimmId >= DIMENSION (spdAddressLookup[0][0])) return AGESA_ERROR; + + spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId]; + if (spdAddress == 0) return AGESA_ERROR; + ioBase = 0xB00; + setupFch (ioBase); + return readspd (ioBase, spdAddress, (void *) info->Buffer, 128); + } |