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authorSiyuan Wang <wangsiyuanbuaa@gmail.com>2012-11-01 18:51:15 +0800
committerMarc Jones <marcj303@gmail.com>2012-11-02 21:04:28 +0100
commitf3b86b3136960c954467a917a0df066b1c35c2aa (patch)
tree20c36dcf8e3712cb50df003b76f2ea5e6bc5264c /src/mainboard/amd/persimmon/devicetree.cb
parentad874e3477ba391d8fe02b0cab6334be67e2e303 (diff)
AMD agesa: add enable cache at the end of disable_cache_as_ram
add this code according to src/include/cpu/x86/cache.h ,line 92, functin enable_cache() Change-Id: Ida96a98397eeed98dd61ca979e8c5a33bf00f9e5 Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com> Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com> Reviewed-on: http://review.coreboot.org/1662 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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