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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-22 10:24:20 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-28 17:25:15 +0200
commitb426107d1db17b606a90be83ddd3bf8a1c0d8751 (patch)
tree0fa5addebf1993a25d8a74fd405bbf59c3def7f8 /src/mainboard/amd/parmer/mptable.c
parentcdfb46240b4bba8a112c85a5f5d26447e90378b3 (diff)
AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf()
Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6359 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/amd/parmer/mptable.c')
-rw-r--r--src/mainboard/amd/parmer/mptable.c29
1 files changed, 12 insertions, 17 deletions
diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c
index 2f5179f56a..05da01a4d9 100644
--- a/src/mainboard/amd/parmer/mptable.c
+++ b/src/mainboard/amd/parmer/mptable.c
@@ -21,6 +21,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam15.h>
@@ -28,9 +29,6 @@
#include <cpu/x86/lapic.h>
#include "southbridge/amd/agesa/hudson/hudson.h" /* pm_ioread() */
-#define IO_APIC_ID CONFIG_MAX_CPUS
-extern u32 apicid_hudson;
-
u8 picr_data[0x54] = {
0x1F,0x1f,0x1f,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x09,0x1F,0x1F,0x0B,0x1F,0x0B,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -70,9 +68,16 @@ static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int bus_isa;
- u32 dword;
u8 byte;
+ /*
+ * By the time this function gets called, the IOAPIC registers
+ * have been written so they can be read to get the correct
+ * APIC ID and Version
+ */
+ u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
@@ -87,17 +92,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
-
- dword = 0;
- dword = pm_read8(0x34) & 0xF0;
- dword |= (pm_read8(0x35) & 0xFF) << 8;
- dword |= (pm_read8(0x36) & 0xFF) << 16;
- dword |= (pm_read8(0x37) & 0xFF) << 24;
- /* Set IO APIC ID onto IO_APIC_ID */
- write32 (dword, 0x00);
- write32 (dword + 0x10, IO_APIC_ID << 24);
- apicid_hudson = IO_APIC_ID;
- smp_write_ioapic(mc, apicid_hudson, 0x21, dword);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
@@ -114,13 +109,13 @@ static void *smp_write_config_table(void *v)
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));
- mptable_add_isa_interrupts(mc, bus_isa, apicid_hudson, 0);
+ mptable_add_isa_interrupts(mc, bus_isa, ioapic_id, 0);
/* PCI interrupts are level triggered, and are
* associated with a specific bus/device/function tuple.
*/
#define PCI_INT(bus, dev, int_sign, pin) \
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_hudson, (pin))
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */
PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]);