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| author | Arthur Heymans <arthur@aheymans.xyz> | 2023-07-13 12:34:04 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-09-01 21:07:10 +0000 |
| commit | 6d3682ee9b19b9e6833f38046891132be665c93c (patch) | |
| tree | 5b74f124c101a1b36bd4448956e0358becf61784 /src/mainboard/amd/onyx/devicetree.cb | |
| parent | 372c4151d4423788e597c1fdf90e003ce4226649 (diff) | |
soc/amd/genoa: Add minimal viable code for compilation
This adds a dummy soc (genoa) based on EXAMPLE_MIN86 with
amd linker script hooked up.
Default to 64bit code as that will be a sensible default for this
platform (high memory access required for RAS setup).
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I69253466084d17c4359d7e824d69f12490b076e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76495
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/amd/onyx/devicetree.cb')
0 files changed, 0 insertions, 0 deletions