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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2019-01-14 16:38:25 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-01-16 11:57:38 +0000
commite97e90959c6d7424911bfbc0096d6054cb27c434 (patch)
tree06b505e6c088ef953ca5cf712458548e0bc87fb8 /src/mainboard/amd/olivehillplus
parent0dbce4042f46475147db8a5d8cd211e1593e7043 (diff)
mb/google/sarien: Set PL1 and PL2 values
Set PL1 and PL2 values to 25W and 51W respectively for processor power limits control. BRANCH=None BUG=b:122343940 TEST=Built and tested on Arcada system Change-Id: I4098f334ed5cb6c4a6f35f1a7b12809f34c23fa3 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/30908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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