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author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2019-12-01 17:42:04 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-12 19:28:33 +0000 |
commit | af258cc1791b5c46fcb13d41128cc99043a435be (patch) | |
tree | 3c143244682d60fed4172086832ae9e4ad66fd76 /src/mainboard/amd/olivehill | |
parent | cbbfb702f693c1bbaf83a9d3d8a3c0caabda1814 (diff) |
mb/*/*: use ACPIMMIO common block wherever possible
TEST=boot PC Engines apu2 and launch Debian Linux
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/amd/olivehill')
-rw-r--r-- | src/mainboard/amd/olivehill/romstage.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 122bb19e3d..dfe7c49f9f 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -14,6 +14,7 @@ */ #include <stdint.h> +#include <amdblocks/acpimmio.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pci_ops.h> @@ -30,12 +31,10 @@ void board_BeforeAgesa(struct sysinfo *cb) * even though the register is not documented in the Kabini BKDG. * Otherwise the serial output is bad code. */ - outb(0xD2, 0xcd6); - outb(0x00, 0xcd7); + pm_io_write8(0xd2, 0); /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ - outb(0xea, 0xcd6); - outb(0x1, 0xcd7); + pm_io_write8(0xea, 1); /* Set LPC decode enables. */ pci_devfn_t dev = PCI_DEV(0, 0x14, 3); |