diff options
| author | Zheng Bao <fishbaozi@gmail.com> | 2020-12-15 10:44:16 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-16 17:17:57 +0000 |
| commit | 9ca96f35f792cb14ecbc0eef7bf4166fdf26efce (patch) | |
| tree | 1cf005b976a46bd37aec29ff8a3deeaf7cb3e54d /src/mainboard/amd/mandolin/variants | |
| parent | 83463076033f30c2b0693b1f39a01cfb9c679cf9 (diff) | |
soc/amd/picasso: Fix the typo in GPIO define
Change-Id: I8c9eed5d0e320b02382c24304a44e51e89eb6ac5
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/amd/mandolin/variants')
| -rw-r--r-- | src/mainboard/amd/mandolin/variants/cereme/early_gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c b/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c index b4ee5f485a..800bd71590 100644 --- a/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c +++ b/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c @@ -13,7 +13,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* not USB_OC2_L */ PAD_GPI(GPIO_18, PULL_UP), /* SDIO eMMC power control */ - PAD_NF(GPIO_22, EMMC_PRW_CTRL, PULL_NONE), + PAD_NF(GPIO_22, EMMC_PWR_CTRL, PULL_NONE), /* PCIe Reset 0 */ PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), /* PCIe Reset 1 */ diff --git a/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c b/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c index 678de59b2c..63e01ef5d9 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c +++ b/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c @@ -17,7 +17,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* not USB_OC2_L */ PAD_GPI(GPIO_18, PULL_UP), /* SDIO eMMC power control */ - PAD_NF(GPIO_22, EMMC_PRW_CTRL, PULL_NONE), + PAD_NF(GPIO_22, EMMC_PWR_CTRL, PULL_NONE), /* PCIe SSD power enable */ PAD_GPO(GPIO_23, HIGH), /* PCIe Reset to DP0, DP1, J2105, TP, FP */ |