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authorRaul E Rangel <rrangel@chromium.org>2021-03-16 11:39:30 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-03-18 18:10:11 +0000
commitd211ede937c9352b3a90d98871d128d858e3f21b (patch)
tree6c508051a92aa94c47988dcb04353eee2208e9bb /src/mainboard/amd/majolica/mainboard.c
parent447a681d3fa4daf8f865ecb5643aaa0c2b05d966 (diff)
mb/amd/majolica: Generate OIPG Package
This fixes the unknown reference errors for OIPG. Since Majolica doesn't actually have any of the GPIOs ChromeOS uses, we leave the arrays empty. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ifeae84e0ccab187a4e7131cd6ea9e1336d79df67 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51536 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/majolica/mainboard.c')
-rw-r--r--src/mainboard/amd/majolica/mainboard.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c
index b38184076e..1a7be4be29 100644
--- a/src/mainboard/amd/majolica/mainboard.c
+++ b/src/mainboard/amd/majolica/mainboard.c
@@ -7,6 +7,7 @@
#include <soc/acpi.h>
#include <string.h>
#include <types.h>
+#include <vendorcode/google/chromeos/chromeos.h>
/*
* These arrays set up the FCH PCI_INTR registers 0xC00/0xC01.
@@ -94,6 +95,8 @@ static void mainboard_enable(struct device *dev)
init_tables();
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
+
+ dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
}
struct chip_operations mainboard_ops = {