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author | Zheng Bao <zheng.bao@amd.com> | 2010-03-16 01:41:14 +0000 |
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committer | Zheng Bao <Zheng.Bao@amd.com> | 2010-03-16 01:41:14 +0000 |
commit | 1088bbff4503df7e8507aae45da823268262ca8f (patch) | |
tree | 414123cac2bdd5f70b10d64082b792e7a52e2c45 /src/mainboard/amd/mahogany/resourcemap.c | |
parent | eff2ffdee8489f97b265b0335b766be3db9a633a (diff) |
Features supported in RS780 code:
* PCIe initialization.
* Internal Graphics initialization.
* HT Link initialization. It works in HT1 or HT3 mode.
Note:
1. I tried to add the description of every step to the code. For example,
if it is made based on rpr, section 2.4.5, I will pasted the words
from 2.4.5 to the c code. But the document I worked with might be
different with the most updated one. A new section has been added and
the 2.4.5 might be changed to 2.5.5. That migh lead to confusing. I
correct every comment if I met one. But I have to confess that I am so
reluctant to find out everyone. I believe it will be correct in the long
run.
2. The interanl graphics part is done by Libo Feng <libo.feng@amd.com>.
3. There is a conflict between RPR and our CIM code. Please see the comment in
switching_gppsb_configurations in rs780_pcie.c.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/mahogany/resourcemap.c')
0 files changed, 0 insertions, 0 deletions