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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-06-02 12:20:11 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-06 01:46:19 +0200
commitf5bde44df2ff954c8af9fd6ab50453f491983dab (patch)
tree001dbb15cd0d15fb4e2fe23176138bc93bcd5801 /src/mainboard/amd/inagua
parent4ba8ba4654aef66283db5a69e40586fb9e186b5a (diff)
superio/smsc/kbc1100: Virtually rewrite support and fix mainboards
1. Remove #include .c in romstage. 2. Make romstage component symbols linker-time. 3. Provide header guards and prototypes in superio romstage support. 4. Correct function type-signatures to be static/non-static where appropriate, avoid 'pretend optimisations' by unnecessarily inlining functions. 5. Separate out UART enable from various other PNP hard coding Change-Id: I9b8dad7c02d802e97db73ddf2913d5c6bb33a419 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5916 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/amd/inagua')
-rw-r--r--src/mainboard/amd/inagua/Kconfig4
-rw-r--r--src/mainboard/amd/inagua/romstage.c7
2 files changed, 5 insertions, 6 deletions
diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig
index 1e11f9fea0..279c7eff62 100644
--- a/src/mainboard/amd/inagua/Kconfig
+++ b/src/mainboard/amd/inagua/Kconfig
@@ -69,10 +69,6 @@ config RAMBASE
hex
default 0x200000
-config SIO_PORT
- hex
- default 0x2e
-
config DRIVERS_PS2_KEYBOARD
bool
default y
diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index a304d318b0..a7b8a40dfd 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -33,11 +33,13 @@
#include "cpu/amd/car.h"
#include "agesawrapper.h"
#include "cpu/x86/bist.h"
-#include "superio/smsc/kbc1100/kbc1100_early_init.c"
+#include <superio/smsc/kbc1100/kbc1100.h>
#include "cpu/x86/lapic.h"
#include <sb_cimx.h>
#include "SBPLATFORM.h"
+#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
+
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
@@ -57,7 +59,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
post_code(0x31);
- kbc1100_early_init(CONFIG_SIO_PORT);
+ kbc1100_early_init(0x2e);
+ kbc1100_early_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
}