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authorKerry She <shekairui@gmail.com>2011-08-18 18:03:44 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2011-09-07 01:08:57 +0200
commitfeed329a0c006968242aa3065506b5f37f4308d4 (patch)
tree0ef0e9e0c112230dd03fe14e199b0be74776b112 /src/mainboard/amd/inagua/mptable.c
parent16d3ec6a58b7a7ba52d4d17299b977e5c3e0557f (diff)
AMD F14 southbridge update
This change adds the southbridge related code to support the update of the AMD Family14 cpus to the rec C0 level. Some of the changes reside in mainboard folders but they reference changed files in the southbridge folder so they are included herein. Change-Id: Ib7786f9f697eaf0bf8abd9140c4dd0c42927ec7e Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Signed-off-by: Kerry She <kerry.she@amd.com> Signed-off-by: Kerry She <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/135 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/inagua/mptable.c')
-rw-r--r--src/mainboard/amd/inagua/mptable.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c
index 86f08db7c1..e3cd5d02d9 100644
--- a/src/mainboard/amd/inagua/mptable.c
+++ b/src/mainboard/amd/inagua/mptable.c
@@ -26,6 +26,7 @@
#include <stdint.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
+#include <SBPLATFORM.h>
#define IO_APIC_ID CONFIG_MAX_PHYSICAL_CPUS + 1
extern u8 bus_sb800[2];
@@ -116,11 +117,8 @@ static void *smp_write_config_table(void *v)
u32 dword;
u8 byte;
- dword = 0;
- dword = pm_ioread(0x34) & 0xF0;
- dword |= (pm_ioread(0x35) & 0xFF) << 8;
- dword |= (pm_ioread(0x36) & 0xFF) << 16;
- dword |= (pm_ioread(0x37) & 0xFF) << 24;
+ ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
+ dword &= 0xFFFFFFF0;
/* Set IO APIC ID onto IO_APIC_ID */
write32 (dword, 0x00);
write32 (dword + 0x10, IO_APIC_ID << 24);