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authorKerry Sheh <shekairui@gmail.com>2012-01-19 13:25:55 +0800
committerMarc Jones <marcj303@gmail.com>2012-02-07 00:25:07 +0100
commitf03360f3f87f9c03a9550c5f4cf3917fdbe56619 (patch)
treea600382e53807d5df18f340a07650937ca4a301f /src/mainboard/amd/inagua/devicetree.cb
parent19329c90d3fb9334df7ba7d7c41848b098cdeccc (diff)
Inagua: Indent and wihtespace cleanup
Change-Id: Ie574e08f138c88084c8ce06d0d0acc489013e3d7 Signed-off-by: Kerry Sheh <shekairui@gmail.com> Signed-off-by: Kerry Sheh <kerry.she@amd.com> Reviewed-on: http://review.coreboot.org/547 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard/amd/inagua/devicetree.cb')
-rw-r--r--src/mainboard/amd/inagua/devicetree.cb120
1 files changed, 60 insertions, 60 deletions
diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb
index 60bb29bfbc..100a5cccb5 100644
--- a/src/mainboard/amd/inagua/devicetree.cb
+++ b/src/mainboard/amd/inagua/devicetree.cb
@@ -17,56 +17,56 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
chip northbridge/amd/agesa/family14/root_complex
- device lapic_cluster 0 on
- chip cpu/amd/agesa/family14
- device lapic 0 on end
- end
- end
- device pci_domain 0 on
- subsystemid 0x1022 0x1510 inherit
- chip northbridge/amd/agesa/family14 # CPU side of HT root complex
-# device pci 18.0 on # northbridge
- chip northbridge/amd/agesa/family14 # PCI side of HT root complex
- device pci 0.0 on end # Root Complex
- device pci 1.0 on end # Internal Graphics P2P bridge, 9802 to 9806
- device pci 1.1 on end # Internal Multimedia
- device pci 4.0 on end # PCIE P2P bridge MXM lane 0
- device pci 5.0 off end # PCIE P2P bridge MXM lane 1
- device pci 6.0 on end # PCIE P2P bridge LAN
- device pci 7.0 on end # PCIE P2P bridge MINIPCIE SLOT1
- device pci 8.0 off end # NB/SB Link P2P bridge
- end # agesa northbridge
+ device lapic_cluster 0 on
+ chip cpu/amd/agesa/family14
+ device lapic 0 on end
+ end
+ end
+ device pci_domain 0 on
+ subsystemid 0x1022 0x1510 inherit
+ chip northbridge/amd/agesa/family14 # CPU side of HT root complex
+# device pci 18.0 on # northbridge
+ chip northbridge/amd/agesa/family14 # PCI side of HT root complex
+ device pci 0.0 on end # Root Complex
+ device pci 1.0 on end # Internal Graphics P2P bridge, 9802 to 9806
+ device pci 1.1 on end # Internal Multimedia
+ device pci 4.0 on end # PCIE P2P bridge MXM lane 0
+ device pci 5.0 off end # PCIE P2P bridge MXM lane 1
+ device pci 6.0 on end # PCIE P2P bridge LAN
+ device pci 7.0 on end # PCIE P2P bridge MINIPCIE SLOT1
+ device pci 8.0 off end # NB/SB Link P2P bridge
+ end # agesa northbridge
- chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
- device pci 11.0 on end # SATA
- device pci 12.0 on end # USB
- device pci 12.1 on end # USB
- device pci 12.2 on end # USB
- device pci 13.0 on end # USB
- device pci 13.1 on end # USB
- device pci 13.2 on end # USB
- device pci 14.0 on # SM
- chip drivers/generic/generic #dimm 0-0-0
- device i2c 50 on end
- end
- chip drivers/generic/generic #dimm 0-0-1
- device i2c 51 on end
- end
- end # SM
- device pci 14.1 on end # IDE 0x439c
- device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on # LPC 0x439d
- chip superio/smsc/kbc1100
- device pnp 2e.7 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- irq 0x72 = 12
- end
- end # kbc1100
+ chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pri bus
+ device pci 11.0 on end # SATA
+ device pci 12.0 on end # USB
+ device pci 12.1 on end # USB
+ device pci 12.2 on end # USB
+ device pci 13.0 on end # USB
+ device pci 13.1 on end # USB
+ device pci 13.2 on end # USB
+ device pci 14.0 on # SM
+ chip drivers/generic/generic #dimm 0-0-0
+ device i2c 50 on end
+ end
+ chip drivers/generic/generic #dimm 0-0-1
+ device i2c 51 on end
+ end
+ end # SM
+ device pci 14.1 on end # IDE 0x439c
+ device pci 14.2 on end # HDA 0x4383
+ device pci 14.3 on # LPC 0x439d
+ chip superio/smsc/kbc1100
+ device pnp 2e.7 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ end # kbc1100
end #LPC
device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
- device pci 14.5 on end # USB 2
+ device pci 14.5 on end # USB 2
device pci 15.0 on end # PCIe PortA Express Card
device pci 15.1 on end # PCIe PortB NEC USB3.0
device pci 15.2 on end # PCIe PortC MINIPCIE SLOT2
@@ -74,20 +74,20 @@ chip northbridge/amd/agesa/family14/root_complex
device pci 16.0 on end # OHCI USB3
device pci 16.2 on end # EHCI USB3
register "gpp_configuration" = "4" #1:1:1:1
- register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
+ register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
end #southbridge/amd/cimx/sb800
-# end # device pci 18.0
+# end # device pci 18.0
# These seem unnecessary
- device pci 18.0 on end
- #device pci 18.0 on end
- device pci 18.1 on end
- device pci 18.2 on end
- device pci 18.3 on end
- device pci 18.4 on end
- device pci 18.5 on end
- device pci 18.6 on end
- device pci 18.7 on end
- end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
- end #pci_domain
+ device pci 18.0 on end
+ #device pci 18.0 on end
+ device pci 18.1 on end
+ device pci 18.2 on end
+ device pci 18.3 on end
+ device pci 18.4 on end
+ device pci 18.5 on end
+ device pci 18.6 on end
+ device pci 18.7 on end
+ end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex
+ end #pci_domain
end #northbridge/amd/agesa/family14/root_complex