diff options
author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2016-10-08 09:53:58 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-12-16 23:02:08 +0100 |
commit | 4bbea904170196b4cc59031a8ada7901def934fb (patch) | |
tree | 3c70cbf4e6fe848b5c7f62680cdb2211ac404664 /src/mainboard/amd/gardenia/devicetree.cb | |
parent | 91135fef22262b1789abeb1a23efc43460cffa3d (diff) |
amd/gardenia: Correct SPD AGESA callout
Gardenia makes no special considerations for a board_id regarding
SPD access and addressing. Remove this from the source and use
the standard AGESA call.
Make SPD address changes to devicetree.cb. Note that Gardenia is
designed to be a two channel, single DIMM/channel system (some SKUs
with two DIMMs on the second channel). However, this port is for
the Stoney processor which is a single channel. As a result, the
second DIMM slot is not usable. A future improvement could involve
a port using a different processor, with unique devicetree files
for each.
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 77511f98f819dfe08c3ed16ebc11e1b328bdca15)
Change-Id: Id00c2be83340ceeec043ec86e96779e6bf46ae7b
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17219
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/gardenia/devicetree.cb')
-rw-r--r-- | src/mainboard/amd/gardenia/devicetree.cb | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/amd/gardenia/devicetree.cb b/src/mainboard/amd/gardenia/devicetree.cb index 946aae99e3..a7573b1b1a 100644 --- a/src/mainboard/amd/gardenia/devicetree.cb +++ b/src/mainboard/amd/gardenia/devicetree.cb @@ -1,7 +1,7 @@ # # This file is part of the coreboot project. # -# Copyright (C) 2015 Advanced Micro Devices, Inc. +# Copyright (C) 2015-2016 Advanced Micro Devices, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -42,10 +42,7 @@ chip northbridge/amd/pi/00670F00/root_complex device pci 11.0 on end # SATA device pci 12.0 on end # EHCI device pci 14.0 on # SM - chip drivers/generic/generic #dimm 0-0-0 - device i2c 50 on end - end - chip drivers/generic/generic #dimm 0-0-1 + chip drivers/generic/generic # dimm 0-0-0 device i2c 51 on end end end # SM |