diff options
| author | Marc Jones <marcj303@gmail.com> | 2016-09-20 20:36:08 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-16 23:01:44 +0100 |
| commit | 91135fef22262b1789abeb1a23efc43460cffa3d (patch) | |
| tree | 2f104054fa80f520be1fd22921f96c97bdc437dd /src/mainboard/amd/gardenia/acpi/mainboard.asl | |
| parent | 3a1fbeaf6608d56b1fce2dfb88c76821b05849db (diff) | |
mainboard/amd: Copy bettong to gardenia and update for build
Use bettong as the reference for the gardenia mainboard.
Update makefiles etc so it builds.
This patch intentionlly keeps the carrizo_fch.asl file to
remain synchronized with the AMD PI package.
Remove items that do not apply to the Stoney APU, rewrite the
comments associated with the PCIe devices, and fix up the
SPD register association to match the 00670F00 chip.h.
Original-Signed-off-by: Marc Jones <marcj303@gmail.com>
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
(cherry picked from commit 82accfcf9ec76a042156fb6e528f7900987b6e7e)
Change-Id: I014fec5c99c01fc02e129be514b704c8ba27d464
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17218
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/gardenia/acpi/mainboard.asl')
| -rw-r--r-- | src/mainboard/amd/gardenia/acpi/mainboard.asl | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/amd/gardenia/acpi/mainboard.asl b/src/mainboard/amd/gardenia/acpi/mainboard.asl new file mode 100644 index 0000000000..508daa7234 --- /dev/null +++ b/src/mainboard/amd/gardenia/acpi/mainboard.asl @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Sage Electronic Engineering, LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Memory related values */ +Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ +Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ +Name(PBLN, 0x0) /* Length of BIOS area */ + +Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ +Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ +Name(HPBA, 0xFED00000) /* Base address of HPET table */ + +Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ + +/* Some global data */ +Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ +Name(OSV, Ones) /* Assume nothing */ +Name(PMOD, One) /* Assume APIC */ |