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| author | Marc Jones <marcj303@gmail.com> | 2016-09-20 20:36:08 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-16 23:01:44 +0100 |
| commit | 91135fef22262b1789abeb1a23efc43460cffa3d (patch) | |
| tree | 2f104054fa80f520be1fd22921f96c97bdc437dd /src/mainboard/amd/gardenia/Kconfig | |
| parent | 3a1fbeaf6608d56b1fce2dfb88c76821b05849db (diff) | |
mainboard/amd: Copy bettong to gardenia and update for build
Use bettong as the reference for the gardenia mainboard.
Update makefiles etc so it builds.
This patch intentionlly keeps the carrizo_fch.asl file to
remain synchronized with the AMD PI package.
Remove items that do not apply to the Stoney APU, rewrite the
comments associated with the PCIe devices, and fix up the
SPD register association to match the 00670F00 chip.h.
Original-Signed-off-by: Marc Jones <marcj303@gmail.com>
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
(cherry picked from commit 82accfcf9ec76a042156fb6e528f7900987b6e7e)
Change-Id: I014fec5c99c01fc02e129be514b704c8ba27d464
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/17218
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/gardenia/Kconfig')
| -rw-r--r-- | src/mainboard/amd/gardenia/Kconfig | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/amd/gardenia/Kconfig b/src/mainboard/amd/gardenia/Kconfig new file mode 100644 index 0000000000..178882f2bc --- /dev/null +++ b/src/mainboard/amd/gardenia/Kconfig @@ -0,0 +1,54 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2015 Advanced Micro Devices, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +if BOARD_AMD_GARDENIA + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_AMD_PI_00670F00 + select NORTHBRIDGE_AMD_PI_00670F00 + select SOUTHBRIDGE_AMD_PI_KERN + select HAVE_OPTION_TABLE + select HAVE_PIRQ_TABLE + select HAVE_MP_TABLE + select HAVE_ACPI_TABLES + select BOARD_ROMSIZE_KB_8192 + select GFXUMA + +config MAINBOARD_DIR + string + default amd/gardenia + +config MAINBOARD_PART_NUMBER + string + default "GARDENIA" + +config MAX_CPUS + int + default 4 + +config IRQ_SLOT_COUNT + int + default 11 + +config ONBOARD_VGA_IS_PRIMARY + bool + default y + +config HUDSON_LEGACY_FREE + bool + default y + +endif # BOARD_AMD_GARDENIA |