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authorAndrey Korolyov <andrey@xdel.ru>2016-07-01 20:06:37 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-07-17 16:50:35 +0200
commitd83b0e9ac4174cca92ac2c3b83a7e8491a9a1ff4 (patch)
treefdc57d975b1f2596812714ccd909b6d67157880c /src/mainboard/amd/f2950/Kconfig
parent3a96ac44e275eca84baea513bc0802f62fe83fd3 (diff)
mainboard/amd: add support for F2950 system board
F2950 SBC, also known as TONK 1201/TONK 1202, was originally produced as a Centerm F2950 using DB800 reference design. Common configuration does include a 600 MHz GeodeLX CPU underclocked to 500 or 400 MHz, 128 or 512 MiB of RAM in the single SODIMM slot and 128 or 512 MB IDE DOM. The board does have three USB 2.0 ports (none of them possessing debug capabilities), PS/2, VGA, Geode audio in/out and the serial port. EEPROM needs to be soldered out and flashed externally at the time of this message because flashrom would neither be able to dump BIOS correctly while running vendor BIOS nor write flash contents. All peripherals were tested against Linux 3.16 and seem to work flawlessly. At the moment of this commit coreboot does not pass PCI_COMMAND_IO from the configuration space to SeaBIOS, thereby preventing VGA OPROM from being executed. This would be fixed in the SeaBIOS itself or in a subsequent commit. As a workaround, user may put VGA OPROM to vgaroms/seavgabios.bin in CBFS. Signed-off-by: Andrey Korolyov <andrey@xdel.ru> Change-Id: I93f13ecb53bd05abc0e07e0bd7ba40e646dcb4c4 Reviewed-on: https://review.coreboot.org/15565 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/amd/f2950/Kconfig')
-rw-r--r--src/mainboard/amd/f2950/Kconfig27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/amd/f2950/Kconfig b/src/mainboard/amd/f2950/Kconfig
new file mode 100644
index 0000000000..5bfe1202ff
--- /dev/null
+++ b/src/mainboard/amd/f2950/Kconfig
@@ -0,0 +1,27 @@
+if BOARD_AMD_F2950
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select CPU_AMD_GEODE_LX
+ select NORTHBRIDGE_AMD_LX
+ select SOUTHBRIDGE_AMD_CS5536
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select PIRQ_ROUTE
+ select UDELAY_TSC
+ select BOARD_ROMSIZE_KB_512
+ select POWER_BUTTON_FORCE_ENABLE
+
+config MAINBOARD_DIR
+ string
+ default amd/f2950
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "F2950"
+
+config IRQ_SLOT_COUNT
+ int
+ default 3
+
+endif # BOARD_AMD_F2950