diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-07 13:25:51 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-02-12 13:33:27 +0000 |
| commit | 4dba4975b4e9710e159a000f7afed46a306134b3 (patch) | |
| tree | 540b66161d2dab62e047e18f7b654c9e218e0f5a /src/mainboard/amd/db-ft3b-lc | |
| parent | 5edbea02d480fd9e1e117475ee52a70ca7a85ecc (diff) | |
binaryPI: Drop nested northbridge in devicetree
SPD data needs to remain within same chip -block
with device 0:18.2.
Change-Id: Ic12481b637ee5f5119faec3239b477f613e4e511
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/mainboard/amd/db-ft3b-lc')
| -rw-r--r-- | src/mainboard/amd/db-ft3b-lc/devicetree.cb | 64 |
1 files changed, 31 insertions, 33 deletions
diff --git a/src/mainboard/amd/db-ft3b-lc/devicetree.cb b/src/mainboard/amd/db-ft3b-lc/devicetree.cb index 1faebf4c70..dfbe3e27d7 100644 --- a/src/mainboard/amd/db-ft3b-lc/devicetree.cb +++ b/src/mainboard/amd/db-ft3b-lc/devicetree.cb @@ -22,42 +22,40 @@ chip northbridge/amd/pi/00730F01/root_complex device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/pi/00730F01 # CPU side of HT root complex - chip northbridge/amd/pi/00730F01 # PCI side of HT root complex - device pci 0.0 on end # Root Complex - device pci 0.2 off end # IOMMU - device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 - device pci 1.1 on end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # x4 PCIe slot - device pci 2.2 on end # mPCIe slot - device pci 2.3 on end # Realtek NIC - device pci 2.4 off end # Edge Connector - device pci 2.5 off end # Edge Connector - device pci 8.0 off end # Platform Security Processor - end #chip northbridge/amd/pi/00730F01 + chip northbridge/amd/pi/00730F01 + device pci 0.0 on end # Root Complex + device pci 0.2 off end # IOMMU + device pci 1.0 on end # Internal Graphics P2P bridge 0x9804 + device pci 1.1 on end # Internal Multimedia + device pci 2.0 on end # PCIe Host Bridge + device pci 2.1 on end # x4 PCIe slot + device pci 2.2 on end # mPCIe slot + device pci 2.3 on end # Realtek NIC + device pci 2.4 off end # Edge Connector + device pci 2.5 off end # Edge Connector + device pci 8.0 off end # Platform Security Processor + end #chip northbridge/amd/pi/00730F01 - chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus - device pci 10.0 on end # XHCI HC0 - device pci 11.0 on end # SATA - device pci 12.0 on end # EHCI #0 - device pci 13.0 on end # EHCI #1 - device pci 14.0 on end # SMBus - device pci 14.2 on end # HDA 0x4383 - device pci 14.3 on end # LPC 0x439d - device pci 14.7 on end # SD - device pci 16.0 on end # EHCI #2 - register "sd_mode" = "3" - end #chip southbridge/amd/pi/hudson + chip southbridge/amd/pi/hudson + device pci 10.0 on end # XHCI HC0 + device pci 11.0 on end # SATA + device pci 12.0 on end # EHCI #0 + device pci 13.0 on end # EHCI #1 + device pci 14.0 on end # SMBus + device pci 14.2 on end # HDA 0x4383 + device pci 14.3 on end # LPC 0x439d + device pci 14.7 on end # SD + device pci 16.0 on end # EHCI #2 + register "sd_mode" = "3" + end #chip southbridge/amd/pi/hudson - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end + device pci 18.0 on end + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + device pci 18.4 on end + device pci 18.5 on end - end #chip northbridge/amd/pi/00730F01 # CPU side of HT root complex end #domain end #northbridge/amd/pi/00730F01/root_complex |