diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-05-26 08:56:10 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-07-20 06:35:07 +0200 |
commit | 546eb451e31f6513ed7a2039fe5848ba04954870 (patch) | |
tree | f2f10a2d65d4fbfc63c21bd92920a8fda7ead55d /src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl | |
parent | e28ac06868225cc60d85246d0d10f4c0e85f25bb (diff) |
amd/db-ft3b-lc: Copy of amd/olivehillplus
Change-Id: I70330278bae54392e236d762716ba7c4d39a05a6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14969
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl')
-rw-r--r-- | src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl new file mode 100644 index 0000000000..0141481d06 --- /dev/null +++ b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Sage Electronic Engineering, LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* Memory related values */ +Name(LOMH, 0x0) /* Start of unused memory in C0000-E0000 range */ +Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */ +Name(PBLN, 0x0) /* Length of BIOS area */ + +Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ +Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ +Name(HPBA, 0xFED00000) /* Base address of HPET table */ + +Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ + +/* Some global data */ +Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ +Name(OSV, Ones) /* Assume nothing */ +Name(PMOD, One) /* Assume APIC */ + +/* AcpiGpe0Blk */ +OperationRegion(GP0B, SystemMemory, 0xfed80814, 0x04) + Field(GP0B, ByteAcc, NoLock, Preserve) { + , 11, + USBS, 1, +} |