diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-01-23 16:28:34 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-25 00:38:03 +0000 |
| commit | 95747bd24df095fae26e6fadb6e8ed0b07e84a06 (patch) | |
| tree | 16f06fc135098da7f378560d41ae917a6298468b /src/mainboard/amd/chausie/devicetree.cb | |
| parent | d244790e3bec3f5dc9f557361b81694f0145b8a0 (diff) | |
mb/amd/chausie/devicetree: enable mp2 device
The mp2 PCI device is still present when no mp2 firmware is loaded. When
this device isn't explicitly enabled in the mainboard's devicetree, the
chipset devicetree default of the device being disabled is used. This
results in coreboot's resource allocator not allocating resources to the
device and since the bridge doesn't have enough MMIO space reserved, the
Linux kernel can't assign resources to it. To fix this problem, enable
the mp2 device in the mainboard's devicetree so that it gets its
resources assigned by coreboot.
TEST=Fixes the resource allocation for the mp2 PCI device.
dmesg output before the patch:
[ 0.210616] pci 0000:04:00.7: [1022:164a] type 00 class 0x118000
[ 0.210631] pci 0000:04:00.7: reg 0x18: [mem 0x00000000-0x000fffff]
[ 0.210641] pci 0000:04:00.7: reg 0x24: [mem 0x00000000-0x00001fff]
[ 0.210649] pci 0000:04:00.7: enabling Extended Tags
[ 0.240570] pci 0000:04:00.7: BAR 2: no space for [mem size 0x00100000]
[ 0.240572] pci 0000:04:00.7: BAR 2: failed to assign [mem size 0x00100000]
[ 0.240574] pci 0000:04:00.7: BAR 5: assigned [mem 0xd05c6000-0xd05c7fff]
dmesg output after the patch:
[ 0.210483] pci 0000:04:00.7: [1022:164a] type 00 class 0x118000
[ 0.210501] pci 0000:04:00.7: reg 0x18: [mem 0xd0500000-0xd05fffff]
[ 0.210515] pci 0000:04:00.7: reg 0x24: [mem 0xd06c6000-0xd06c7fff]
[ 0.210524] pci 0000:04:00.7: enabling Extended Tags
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I680ef9798f2f0e7e0646f0fd30bef58398b7bf19
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72197
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/amd/chausie/devicetree.cb')
| -rw-r--r-- | src/mainboard/amd/chausie/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/amd/chausie/devicetree.cb b/src/mainboard/amd/chausie/devicetree.cb index 5cfd42f0f1..2e6511e266 100644 --- a/src/mainboard/amd/chausie/devicetree.cb +++ b/src/mainboard/amd/chausie/devicetree.cb @@ -200,6 +200,7 @@ chip soc/amd/mendocino end end device ref acp on end # Audio Processor (ACP) + device ref mp2 on end # Sensor Fusion Hub (MP2) end device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C device ref xhci_2 on |