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authorMartin Roth <gaumless@gmail.com>2024-01-18 15:52:48 -0700
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-24 10:17:55 +0000
commit3d606cffb115bbb541eea1713092e4472a5a6923 (patch)
tree84f1fe10c5da876c5552acf0685637aecb4eea27 /src/mainboard/amd/chausie/Makefile.mk
parent354389365bac2c972749b9fc4fd21c6cd953cb59 (diff)
mb/51nb to mb/gigabyte: Rename Makefiles from .inc to .mk
The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I422cb475723006ca42be93508fb0bf4b1e4e84d3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80104 Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/mainboard/amd/chausie/Makefile.mk')
-rw-r--r--src/mainboard/amd/chausie/Makefile.mk43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/amd/chausie/Makefile.mk b/src/mainboard/amd/chausie/Makefile.mk
new file mode 100644
index 0000000000..a5954362ce
--- /dev/null
+++ b/src/mainboard/amd/chausie/Makefile.mk
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += bootblock.c
+bootblock-y += early_gpio.c
+bootblock-y += ec.c
+
+romstage-y += port_descriptors.c
+
+ramstage-y += chromeos.c
+ramstage-y += gpio.c
+ramstage-y += port_descriptors.c
+
+ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/APCB_FT6.bin),)
+APCB_SOURCES = $(MAINBOARD_BLOBS_DIR)/APCB_FT6.bin
+APCB_SOURCES_RECOVERY = $(MAINBOARD_BLOBS_DIR)/APCB_FT6_DefaultRecovery.bin
+else
+show_notices:: warn_no_apcb
+endif
+
+ifeq ($(CONFIG_CHAUSIE_HAVE_MCHP_FW),y)
+$(call add_intermediate, add_mchp_fw)
+ $(CBFSTOOL) $(obj)/coreboot.pre write -r EC -f $(CONFIG_CHAUSIE_MCHP_SIG_FILE) --fill-upward
+
+# calculate the absolute position from the config offset
+CHAUSIE_EC_POSITION=$(call int-add, \
+ $(call int-subtract, 0xffffffff \
+ $(CONFIG_ROM_SIZE)) $(CONFIG_CHAUSIE_MCHP_FW_OFFSET) 1)
+
+cbfs-files-y += ec/ecfw
+ec/ecfw-file := $(CONFIG_CHAUSIE_MCHP_FW_FILE)
+ec/ecfw-position := $(CHAUSIE_EC_POSITION)
+ec/ecfw-type := raw
+
+else
+show_notices:: warn_no_mchp
+endif # CONFIG_CHAUSIE_HAVE_MCHP_FW
+
+PHONY+=warn_no_mchp
+warn_no_mchp:
+ printf "\n\t** WARNING **\n"
+ printf "coreboot has been built without the Microchip EC FW.\n"
+ printf "Do not flash this image. Your Chausie's power button\n"
+ printf "will not respond when you press it.\n\n"