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authorFelix Held <felix-coreboot@felixheld.de>2021-05-25 21:20:00 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-05-28 18:16:42 +0000
commitf3819bdf2e5f4ed9ca1572f6742683dad78f0e04 (patch)
treec9e4db046eeef51113a2a61e8b95995f9c1049f8 /src/mainboard/amd/bilby/devicetree.cb
parent71099258cc384bbc5882bb8a782bd5bb755d6c9b (diff)
mb/amd/bilby,cereme,mandolin: change PSPP policy to balanced
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7571ed92b3c3fa79581e2c7342960ca31451af1f Reviewed-on: https://review.coreboot.org/c/coreboot/+/54935 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/mainboard/amd/bilby/devicetree.cb')
-rw-r--r--src/mainboard/amd/bilby/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb
index 7797c3e44d..8adbaa2f50 100644
--- a/src/mainboard/amd/bilby/devicetree.cb
+++ b/src/mainboard/amd/bilby/devicetree.cb
@@ -136,7 +136,7 @@ chip soc/amd/picasso
register "gpp_clk_config[5]" = "GPP_CLK_REQ"
register "gpp_clk_config[6]" = "GPP_CLK_REQ"
- register "pspp_policy" = "DXIO_PSPP_POWERSAVE"
+ register "pspp_policy" = "DXIO_PSPP_BALANCED"
device cpu_cluster 0 on
device lapic 0 on end