mainboard/amd/bilby: Add Bilby CRB board

Bilby is the reference board for AMD Raven, Raven2 and Picasso APUs.
Bilby mainboard code is taken from mandolin variant Cereme.
These new files are a renamed copy and subsequent patches will be
applied to create a working bilby implementation.

Change-Id: I426966d782e259a971ec36bac2498bc62b4ce7e2
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/src/mainboard/amd/bilby/bootblock.c b/src/mainboard/amd/bilby/bootblock.c
new file mode 100644
index 0000000000..94a132938f
--- /dev/null
+++ b/src/mainboard/amd/bilby/bootblock.c
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <amdblocks/lpc.h>
+#include <superio/smsc/sio1036/sio1036.h>
+#include "gpio.h"
+
+#define SERIAL_DEV PNP_DEV(CONFIG_SUPERIO_ADDR_BASE, SIO1036_SP1)
+
+void bootblock_mainboard_early_init(void)
+{
+	mainboard_program_early_gpios();
+
+	if (CONFIG(SUPERIO_SMSC_SIO1036)) {
+		if (CONFIG_SUPERIO_ADDR_BASE == 0x4e) {
+			lpc_enable_sio_decode(LPC_SELECT_SIO_4E4F);
+		} else {
+			// set up 16 byte wide I/O range window for the super IO
+			lpc_set_wideio_range(CONFIG_SUPERIO_ADDR_BASE & ~0xF, 16);
+		}
+		lpc_enable_decode(DECODE_ENABLE_SERIAL_PORT0 << CONFIG_UART_FOR_CONSOLE);
+		sio1036_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+	}
+}