mb/amd/bettong: Drop unmaintained ROMCC board

Remove unmaintained and unsupported old ROMCC board.
This board wasn't hooked up for build.

Change-Id: I1bce09ba5041a6636f900de611846467653f35a9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

6 files changed, 0 insertions, 661 deletions

diff --git a/src/mainboard/amd/bettong/acpi/carrizo_fch.asl b/src/mainboard/amd/bettong/acpi/carrizo_fch.asl
deleted file mode 100644
index 79f54203d2..0000000000
--- a/src/mainboard/amd/bettong/acpi/carrizo_fch.asl
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-Device(GPIO) {
-	Name (_HID, "AMD0030")
-	Name (_CID, "AMD0030")
-	Name(_UID, 0)
-
-	Method (_CRS, 0x0, NotSerialized) {
-		Name (RBUF, ResourceTemplate () {
-			//
-			// Interrupt resource. In this example, banks 0 & 1 share the same
-			// interrupt to the parent controller and similarly banks 2 & 3.
-			//
-			// N.B. The definition below is chosen for an arbitrary
-			//      test platform. It needs to be changed to reflect the hardware
-			//      configuration of the actual platform
-			//
-			Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
-
-			//
-			// Memory resource. The definition below is chosen for an arbitrary
-			// test platform. It needs to be changed to reflect the hardware
-			// configuration of the actual platform.
-			//
-			Memory32Fixed(ReadWrite, 0xFED81500, 0x300)
-		})
-
-		Return (RBUF)
-	}
-
-	Method (_STA, 0x0, NotSerialized) {
-			Return (0x0F)
-	}
-}
-
-Device(FUR0) {
-	Name(_HID,"AMD0020")
-	Name(_UID,0x0)
-	Name(_CRS, ResourceTemplate() {
-		IRQ(Edge, ActiveHigh, Exclusive) {10}
-		Memory32Fixed(ReadWrite, 0xFEDC6000, 0x2000)
-	})
-	Method (_STA, 0x0, NotSerialized) {
-		Return (0x0F)
-	}
-}
-
-Device(FUR1) {
-	Name(_HID,"AMD0020")
-	Name(_UID,0x1)
-	Name(_CRS, ResourceTemplate() {
-			IRQ(Edge, ActiveHigh, Exclusive) {11}
-			Memory32Fixed(ReadWrite, 0xFEDC8000, 0x2000)
-	})
-	Method (_STA, 0x0, NotSerialized) {
-			Return (0x0F)
-	}
-}
-
-Device(I2CA) {
-	Name(_HID,"AMD0010")
-	Name(_UID,0x0)
-	Name(_CRS, ResourceTemplate() {
-		IRQ(Edge, ActiveHigh, Exclusive) {3}
-		Memory32Fixed(ReadWrite, 0xFEDC2000, 0x1000)
-	})
-
-	Method (_STA, 0x0, NotSerialized) {
-		Return (0x0F)
-	}
-}
-
-Device(I2CB)
-{
-	Name(_HID,"AMD0010")
-	Name(_UID,0x1)
-	Name(_CRS, ResourceTemplate() {
-		IRQ(Edge, ActiveHigh, Exclusive) {15}
-		Memory32Fixed(ReadWrite, 0xFEDC3000, 0x1000)
-	})
-	Method (_STA, 0x0, NotSerialized) {
-		Return (0x0F)
-	}
-}
diff --git a/src/mainboard/amd/bettong/acpi/gpe.asl b/src/mainboard/amd/bettong/acpi/gpe.asl
deleted file mode 100644
index 87b0d2169d..0000000000
--- a/src/mainboard/amd/bettong/acpi/gpe.asl
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-Scope(\_GPE) {	/* Start Scope GPE */
-
-	/*  General event 3  */
-	Method(_L03) {
-		/* DBGO("\\_GPE\\_L00\n") */
-		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-
-	/*  Legacy PM event  */
-	Method(_L08) {
-		/* DBGO("\\_GPE\\_L08\n") */
-	}
-
-	/*  Temp warning (TWarn) event  */
-	Method(_L09) {
-		/* DBGO("\\_GPE\\_L09\n") */
-		/* Notify (\_TZ.TZ00, 0x80) */
-	}
-
-	/*  USB controller PME#  */
-	Method(_L0B) {
-		/* DBGO("\\_GPE\\_L0B\n") */
-		Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.XHC0, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-
-	/*  ExtEvent0 SCI event  */
-	Method(_L10) {
-		/* DBGO("\\_GPE\\_L10\n") */
-	}
-
-	/*  ExtEvent1 SCI event  */
-	Method(_L11) {
-		/* DBGO("\\_GPE\\_L11\n") */
-	}
-
-	/*  GPIO0 or GEvent8 event  */
-	Method(_L18) {
-		/* DBGO("\\_GPE\\_L18\n") */
-		Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-
-	/*  Azalia SCI event  */
-	Method(_L1B) {
-		/* DBGO("\\_GPE\\_L1B\n") */
-		Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
-		Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
-	}
-}	/* End Scope GPE */
diff --git a/src/mainboard/amd/bettong/acpi/mainboard.asl b/src/mainboard/amd/bettong/acpi/mainboard.asl
deleted file mode 100644
index db5731f088..0000000000
--- a/src/mainboard/amd/bettong/acpi/mainboard.asl
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Memory related values */
-Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
-Name(PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
-Name(PBLN, 0x0)	/* Length of BIOS area */
-
-Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
-Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
-
-/* Some global data */
-Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
-Name(OSV, Ones)	/* Assume nothing */
-Name(PMOD, One)	/* Assume APIC */
diff --git a/src/mainboard/amd/bettong/acpi/routing.asl b/src/mainboard/amd/bettong/acpi/routing.asl
deleted file mode 100644
index 0c4edbbee9..0000000000
--- a/src/mainboard/amd/bettong/acpi/routing.asl
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
-#include <arch/acpi.h>
-DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001
-		)
-	{
-		#include "routing.asl"
-	}
-*/
-
-/* Routing is in System Bus scope */
-Name(PR0, Package(){
-	/* NB devices */
-	/* Bus 0, Dev 0 - F16 Host Controller */
-
-	/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
-	/* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */
-	Package(){0x0001FFFF, 0, INTB, 0 },
-	Package(){0x0001FFFF, 1, INTC, 0 },
-
-
-	/* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */
-	Package(){0x0002FFFF, 0, INTC, 0 },
-	Package(){0x0002FFFF, 1, INTD, 0 },
-	Package(){0x0002FFFF, 2, INTA, 0 },
-	Package(){0x0002FFFF, 3, INTB, 0 },
-
-	/* FCH devices */
-	/* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
-	Package(){0x0014FFFF, 0, INTA, 0 },
-	Package(){0x0014FFFF, 1, INTB, 0 },
-	Package(){0x0014FFFF, 2, INTC, 0 },
-	Package(){0x0014FFFF, 3, INTD, 0 },
-
-	/* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
-	/* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
-	Package(){0x0012FFFF, 0, INTC, 0 },
-	Package(){0x0012FFFF, 1, INTB, 0 },
-
-	Package(){0x0013FFFF, 0, INTC, 0 },
-	Package(){0x0013FFFF, 1, INTB, 0 },
-
-	Package(){0x0016FFFF, 0, INTC, 0 },
-	Package(){0x0016FFFF, 1, INTB, 0 },
-
-	/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
-	Package(){0x0010FFFF, 0, INTC, 0 },
-	Package(){0x0010FFFF, 1, INTB, 0 },
-
-	/* Bus 0, Dev 17 - SATA controller */
-	Package(){0x0011FFFF, 0, INTD, 0 },
-
-})
-
-Name(APR0, Package(){
-	/* NB devices in APIC mode */
-	/* Bus 0, Dev 0 - F15 Host Controller */
-
-	/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */
-	Package(){0x0001FFFF, 0, 0, 43 },
-	Package(){0x0001FFFF, 1, 0, 40 },
-
-	/* Bus 0, Dev 2 - PCIe Bridges  */
-	Package(){0x0002FFFF, 0, 0, 44 },
-	Package(){0x0002FFFF, 1, 0, 45 },
-	Package(){0x0002FFFF, 2, 0, 46 },
-	Package(){0x0002FFFF, 3, 0, 47 },
-
-	Package(){0x0003FFFF, 0, 0, 49 },
-	Package(){0x0003FFFF, 1, 0, 50 },
-	Package(){0x0003FFFF, 2, 0, 51 },
-	Package(){0x0003FFFF, 3, 0, 52 },
-
-	Package(){0x0008FFFF, 0, 0, 35 },
-	Package(){0x0008FFFF, 1, 0, 32 },
-	Package(){0x0008FFFF, 2, 0, 33 },
-	Package(){0x0008FFFF, 3, 0, 34 },
-
-	/* SB devices in APIC mode */
-	/* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */
-	Package(){0x0014FFFF, 0, 0, 16 },
-	Package(){0x0014FFFF, 1, 0, 17 },
-	Package(){0x0014FFFF, 2, 0, 18 },
-	Package(){0x0014FFFF, 3, 0, 19 },
-
-	/* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */
-	/* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */
-	Package(){0x0012FFFF, 0, 0, 18 },
-	Package(){0x0012FFFF, 1, 0, 17 },
-
-	Package(){0x0013FFFF, 0, 0, 18 },
-	Package(){0x0013FFFF, 1, 0, 17 },
-
-	/* Bus 0, Dev 10 - USB: XHCI func 0, 1 */
-	Package(){0x0010FFFF, 0, 0, 18},
-	Package(){0x0010FFFF, 1, 0, 17},
-
-	/* Bus 0, Dev 17 - SATA controller */
-	Package(){0x0011FFFF, 0, 0, 19 },
-
-	/* Bus 0, Dev 9, Func 2 - HDAudio */
-	Package(){0x0009FFFF, 0, 0, 39 },
-	Package(){0x0009FFFF, 1, 0, 36 },
-	Package(){0x0009FFFF, 2, 0, 37 },
-	Package(){0x0009FFFF, 3, 0, 38 },
-})
-
-Name(PS2, Package(){
-	Package(){0x0000FFFF, 0, INTC, 0 },
-	Package(){0x0000FFFF, 1, INTD, 0 },
-	Package(){0x0000FFFF, 2, INTA, 0 },
-	Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS2, Package(){
-	Package(){0x0000FFFF, 0, 0, 18 },
-	Package(){0x0000FFFF, 1, 0, 19 },
-	Package(){0x0000FFFF, 2, 0, 16 },
-	Package(){0x0000FFFF, 3, 0, 17 },
-})
-
-/* GFX */
-Name(PS4, Package(){
-	Package(){0x0000FFFF, 0, INTA, 0 },
-	Package(){0x0000FFFF, 1, INTB, 0 },
-	Package(){0x0000FFFF, 2, INTC, 0 },
-	Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS4, Package(){
-	/* PCIe slot - Hooked to PCIe slot 4 */
-	Package(){0x0000FFFF, 0, 0, 24 },
-	Package(){0x0000FFFF, 1, 0, 25 },
-	Package(){0x0000FFFF, 2, 0, 26 },
-	Package(){0x0000FFFF, 3, 0, 27 },
-})
-
-/* GPP 0 */
-Name(PS5, Package(){
-	Package(){0x0000FFFF, 0, INTB, 0 },
-	Package(){0x0000FFFF, 1, INTC, 0 },
-	Package(){0x0000FFFF, 2, INTD, 0 },
-	Package(){0x0000FFFF, 3, INTA, 0 },
-})
-Name(APS5, Package(){
-	Package(){0x0000FFFF, 0, 0, 28 },
-	Package(){0x0000FFFF, 1, 0, 29 },
-	Package(){0x0000FFFF, 2, 0, 30 },
-	Package(){0x0000FFFF, 3, 0, 31 },
-})
-
-/* GPP 1 */
-Name(PS6, Package(){
-	Package(){0x0000FFFF, 0, INTC, 0 },
-	Package(){0x0000FFFF, 1, INTD, 0 },
-	Package(){0x0000FFFF, 2, INTA, 0 },
-	Package(){0x0000FFFF, 3, INTB, 0 },
-})
-Name(APS6, Package(){
-	Package(){0x0000FFFF, 0, 0, 32 },
-	Package(){0x0000FFFF, 1, 0, 33 },
-	Package(){0x0000FFFF, 2, 0, 34 },
-	Package(){0x0000FFFF, 3, 0, 35 },
-})
-
-/* GPP 2 */
-Name(PS7, Package(){
-	Package(){0x0000FFFF, 0, INTD, 0 },
-	Package(){0x0000FFFF, 1, INTA, 0 },
-	Package(){0x0000FFFF, 2, INTB, 0 },
-	Package(){0x0000FFFF, 3, INTC, 0 },
-})
-Name(APS7, Package(){
-	Package(){0x0000FFFF, 0, 0, 36 },
-	Package(){0x0000FFFF, 1, 0, 37 },
-	Package(){0x0000FFFF, 2, 0, 38 },
-	Package(){0x0000FFFF, 3, 0, 39 },
-})
-
-/* GPP 3 */
-Name(PS8, Package(){
-	Package(){0x0000FFFF, 0, INTA, 0 },
-	Package(){0x0000FFFF, 1, INTB, 0 },
-	Package(){0x0000FFFF, 2, INTC, 0 },
-	Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APS8, Package(){
-	Package(){0x0000FFFF, 0, 0, 40 },
-	Package(){0x0000FFFF, 1, 0, 41 },
-	Package(){0x0000FFFF, 2, 0, 42 },
-	Package(){0x0000FFFF, 3, 0, 43 },
-})
-
-/* GFX 2 */
-Name(PSA, Package(){
-	Package(){0x0000FFFF, 0, INTA, 0 },
-	Package(){0x0000FFFF, 1, INTB, 0 },
-	Package(){0x0000FFFF, 2, INTC, 0 },
-	Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APSA, Package(){
-	Package(){0x0000FFFF, 0, 0, 52 },
-	Package(){0x0000FFFF, 1, 0, 53 },
-	Package(){0x0000FFFF, 2, 0, 54 },
-	Package(){0x0000FFFF, 3, 0, 55 },
-})
-
-/* GFX 3 */
-Name(PSB, Package(){
-	Package(){0x0000FFFF, 0, INTA, 0 },
-	Package(){0x0000FFFF, 1, INTB, 0 },
-	Package(){0x0000FFFF, 2, INTC, 0 },
-	Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APSB, Package(){
-	Package(){0x0000FFFF, 0, 0, 27 },
-	Package(){0x0000FFFF, 1, 0, 24 },
-	Package(){0x0000FFFF, 2, 0, 25 },
-	Package(){0x0000FFFF, 3, 0, 26 },
-})
-
-/* GFX 4 */
-Name(PSC, Package(){
-	Package(){0x0000FFFF, 0, INTA, 0 },
-	Package(){0x0000FFFF, 1, INTB, 0 },
-	Package(){0x0000FFFF, 2, INTC, 0 },
-	Package(){0x0000FFFF, 3, INTD, 0 },
-})
-Name(APSC, Package(){
-	Package(){0x0000FFFF, 0, 0, 31 },
-	Package(){0x0000FFFF, 1, 0, 28 },
-	Package(){0x0000FFFF, 2, 0, 29 },
-	Package(){0x0000FFFF, 3, 0, 30 },
-})
diff --git a/src/mainboard/amd/bettong/acpi/sleep.asl b/src/mainboard/amd/bettong/acpi/sleep.asl
deleted file mode 100644
index 58f0752f30..0000000000
--- a/src/mainboard/amd/bettong/acpi/sleep.asl
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* Wake status package */
-Name(WKST,Package(){Zero, Zero})
-
-/*
-* \_PTS - Prepare to Sleep method
-*
-*	Entry:
-*		Arg0=The value of the sleeping state S1=1, S2=2, etc
-*
-* Exit:
-*		-none-
-*
-* The _PTS control method is executed at the beginning of the sleep process
-* for S1-S5. The sleeping value is passed to the _PTS control method.  This
-* control method may be executed a relatively long time before entering the
-* sleep state and the OS may abort the operation without notification to
-* the ACPI driver.  This method cannot modify the configuration or power
-* state of any device in the system.
-*/
-Method(_PTS, 1) {
-	/* DBGO("\\_PTS\n") */
-	/* DBGO("From S0 to S") */
-	/* DBGO(Arg0) */
-	/* DBGO("\n") */
-
-	/* Clear wake status structure. */
-	Store(0, PEWD)
-	Store(0, Index(WKST,0))
-	Store(0, Index(WKST,1))
-	Store(7, UPWS)
-} /* End Method(\_PTS) */
-
-/*
-*	\_BFS OEM Back From Sleep method
-*
-*	Entry:
-*		Arg0=The value of the sleeping state S1=1, S2=2
-*
-*	Exit:
-*		-none-
-*/
-Method(\_BFS, 1) {
-	/* DBGO("\\_BFS\n") */
-	/* DBGO("From S") */
-	/* DBGO(Arg0) */
-	/* DBGO(" to S0\n") */
-}
-
-/*
-*  \_WAK System Wake method
-*
-*	Entry:
-*		Arg0=The value of the sleeping state S1=1, S2=2
-*
-*	Exit:
-*		Return package of 2 DWords
-*		Dword 1 - Status
-*			0x00000000	wake succeeded
-*			0x00000001	Wake was signaled but failed due to lack of power
-*			0x00000002	Wake was signaled but failed due to thermal condition
-*		Dword 2 - Power Supply state
-*			if non-zero the effective S-state the power supply entered
-*/
-Method(\_WAK, 1) {
-	/* DBGO("\\_WAK\n") */
-	/* DBGO("From S") */
-	/* DBGO(Arg0) */
-	/* DBGO(" to S0\n") */
-
-	Return(WKST)
-} /* End Method(\_WAK) */
diff --git a/src/mainboard/amd/bettong/acpi/usb_oc.asl b/src/mainboard/amd/bettong/acpi/usb_oc.asl
deleted file mode 100644
index 328883af91..0000000000
--- a/src/mainboard/amd/bettong/acpi/usb_oc.asl
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* simple name description */
-/*
-#include <arch/acpi.h>
-DefinitionBlock ("DSDT.AML", "DSDT", 0x01, OEM_ID, ACPI_TABLE_CREATOR, 0x00010001
-		)
-	{
-		#include "usb.asl"
-	}
-*/
-
-/* USB overcurrent mapping pins.   */
-Name(UOM0, 0)
-Name(UOM1, 2)
-Name(UOM2, 0)
-Name(UOM3, 7)
-Name(UOM4, 2)
-Name(UOM5, 2)
-Name(UOM6, 6)
-Name(UOM7, 2)
-Name(UOM8, 6)
-Name(UOM9, 6)
-
-/* USB Overcurrent GPEs */
-
-#if 0 /* TODO: Update for Bettong */
-Method(UCOC, 0) {
-	Sleep(20)
-	Store(0x13,CMTI)
-	Store(0,GPSL)
-}
-
-/* USB Port 0 overcurrent uses Gpm 0 */
-If(LLessEqual(UOM0,9)) {
-	Scope (\_GPE) {
-		Method (_L13) {
-		}
-	}
-}
-
-/* USB Port 1 overcurrent uses Gpm 1 */
-If (LLessEqual(UOM1,9)) {
-	Scope (\_GPE) {
-		Method (_L14) {
-		}
-	}
-}
-
-/* USB Port 2 overcurrent uses Gpm 2 */
-If (LLessEqual(UOM2,9)) {
-	Scope (\_GPE) {
-		Method (_L15) {
-		}
-	}
-}
-
-/* USB Port 3 overcurrent uses Gpm 3 */
-If (LLessEqual(UOM3,9)) {
-	Scope (\_GPE) {
-		Method (_L16) {
-		}
-	}
-}
-
-/* USB Port 4 overcurrent uses Gpm 4 */
-If (LLessEqual(UOM4,9)) {
-	Scope (\_GPE) {
-		Method (_L19) {
-		}
-	}
-}
-
-/* USB Port 5 overcurrent uses Gpm 5 */
-If (LLessEqual(UOM5,9)) {
-	Scope (\_GPE) {
-		Method (_L1A) {
-		}
-	}
-}
-
-/* USB Port 6 overcurrent uses Gpm 6 */
-If (LLessEqual(UOM6,9)) {
-	Scope (\_GPE) {
-		/* Method (_L1C) { */
-		Method (_L06) {
-		}
-	}
-}
-
-/* USB Port 7 overcurrent uses Gpm 7 */
-If (LLessEqual(UOM7,9)) {
-	Scope (\_GPE) {
-		/* Method (_L1D) { */
-		Method (_L07) {
-		}
-	}
-}
-
-/* USB Port 8 overcurrent uses Gpm 8 */
-If (LLessEqual(UOM8,9)) {
-	Scope (\_GPE) {
-		Method (_L17) {
-		}
-	}
-}
-
-/* USB Port 9 overcurrent uses Gpm 9 */
-If (LLessEqual(UOM9,9)) {
-	Scope (\_GPE) {
-		Method (_L0E) {
-		}
-	}
-}
-#endif