diff options
| author | Martin Roth <martinroth@google.com> | 2017-06-24 21:45:13 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-06 00:19:48 +0000 |
| commit | f95911ad3765c0f94db241b0c95a6c0a8c608077 (patch) | |
| tree | 9ba34618cff9bbc021348458468d1de0feeaa4b2 /src/mainboard/advansus/a785e-i/romstage.c | |
| parent | 1bf55b4070bef2be8259f3153cade27121127b4a (diff) | |
mainboard/[a-e]: add IS_ENABLED() around Kconfig symbol references
Change-Id: Icca8bac5e67f83dfc5a8f5ef1cb87c6432e0a236
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/advansus/a785e-i/romstage.c')
| -rw-r--r-- | src/mainboard/advansus/a785e-i/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index f145c25707..716190387d 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -144,7 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ wait_all_core0_started(); -#if CONFIG_LOGICAL_CPUS +#if IS_ENABLED(CONFIG_LOGICAL_CPUS) /* Core0 on each node is configured. Now setup any additional cores. */ printk(BIOS_DEBUG, "start_other_cores()\n"); start_other_cores(bsp_apicid); @@ -158,7 +158,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) rs780_early_setup(); sb800_early_setup(); -#if CONFIG_SET_FIDVID +#if IS_ENABLED(CONFIG_SET_FIDVID) msr = rdmsr(0xc0010071); printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); post_code(0x39); |