aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/advansus/a785e-i/mb_sysconf.h
diff options
context:
space:
mode:
authorKerry She <kerry.she@amd.com>2011-05-07 09:15:02 +0000
committerKerry She <Kerry.She@amd.com>2011-05-07 09:15:02 +0000
commit6401fdb02593940e3091b1d200c64d9c1d7269f3 (patch)
treedf835364607d2fcfa68d6fd2e5d1472d7d307c72 /src/mainboard/advansus/a785e-i/mb_sysconf.h
parentfaafd14fe0d18de1f71491f4503f36a4f9d9a188 (diff)
ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) + SB820 platform.
Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/advansus/a785e-i/mb_sysconf.h')
-rw-r--r--src/mainboard/advansus/a785e-i/mb_sysconf.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/mainboard/advansus/a785e-i/mb_sysconf.h b/src/mainboard/advansus/a785e-i/mb_sysconf.h
new file mode 100644
index 0000000000..ca5870ce38
--- /dev/null
+++ b/src/mainboard/advansus/a785e-i/mb_sysconf.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef MB_SYSCONF_H
+#define MB_SYSCONF_H
+
+struct mb_sysconf_t {
+ u8 bus_isa;
+ u8 bus_8132_0;
+ u8 bus_8132_1;
+ u8 bus_8132_2;
+ u8 bus_8111_0;
+ u8 bus_8111_1;
+ u8 bus_8132a[31][3];
+ u8 bus_8151[31][2];
+
+ u32 apicid_8111;
+ u32 apicid_8132_1;
+ u32 apicid_8132_2;
+ u32 apicid_8132a[31][2];
+ u32 sbdn3;
+ u32 sbdn3a[31];
+ u32 sbdn5[31];
+ u32 bus_type[256];
+};
+
+#endif