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authorLin Huang <hl@rock-chips.com>2016-10-17 10:31:30 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-11-03 13:53:18 +0100
commit60687b52076ec6d4da3587859adcb0d49a05aca0 (patch)
tree3426873e778930b4aa548d9abfdaba61d010ef36 /src/mainboard/abit
parentd36ed272b2d2d082889a7f21414904badc2c2936 (diff)
rockchip/rk3399: sdram.c: Fix msch ddrconfig register error
Fix msch ddrconfig register write error. Also make sure that the row number configured in msch is equal to the row number configured in the DDR controller. This would not affect systems with 4GB of memory, but is needed for 2GB configurations. BUG=None BRANCH=None TEST=Boot from kevin Change-Id: Ic95b3371faec5b31c32b011c50e55e83d949e74d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dfa43d3d44839d9685b6393157f51b646e9996de Original-Change-Id: I0c95378bf937a245b7cdc0583c5d2ed1347f2a3e Original-Signed-off-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/399563 Original-Reviewed-by: Derek Basehore <dbasehore@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/17208 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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