diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
---|---|---|
committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-04 11:04:33 +0000 |
commit | 018d8dd60f2cc0c82faac0ee2657daa163dd43e7 (patch) | |
tree | 528de120d262a9df05ce8b6119f593c85fa6b809 /src/mainboard/Iwill/DK8X/cmos.layout | |
parent | 4403f6082372d069e3cabe0918d9af5f9c1dccf6 (diff) |
- Update abuild.sh so it will rebuild successfull builds
- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
enabled. All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/Iwill/DK8X/cmos.layout')
-rw-r--r-- | src/mainboard/Iwill/DK8X/cmos.layout | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/src/mainboard/Iwill/DK8X/cmos.layout b/src/mainboard/Iwill/DK8X/cmos.layout index 5ba4c032c1..1ab6187288 100644 --- a/src/mainboard/Iwill/DK8X/cmos.layout +++ b/src/mainboard/Iwill/DK8X/cmos.layout @@ -29,6 +29,9 @@ entries 386 1 e 1 ECC_memory 388 4 r 0 reboot_bits 392 3 e 5 baud_rate +395 1 e 1 hw_scrubber +396 1 e 1 interleave_chip_selects +397 2 e 8 max_mem_clock 400 1 e 1 power_on_after_fail 412 4 e 6 debug_level 416 4 e 7 boot_first @@ -36,7 +39,15 @@ entries 424 4 e 7 boot_third 428 4 h 0 boot_index 432 8 h 0 boot_countdown -1008 16 h 0 check_sum +440 4 e 9 slow_cpu +444 1 e 1 nmi +445 1 e 1 iommu +728 256 h 0 user_data +984 16 h 0 check_sum +# Reserve the extended AMD configuration registers +1000 24 r 0 reserved_memory + + enumerations @@ -66,9 +77,19 @@ enumerations 7 9 Fallback_HDD 7 10 Fallback_Floppy #7 3 ROM +8 0 200Mhz +8 1 166Mhz +8 2 133Mhz +8 3 100Mhz +9 0 off +9 1 87.5% +9 2 75.0% +9 3 62.5% +9 4 50.0% +9 5 37.5% +9 6 25.0% +9 7 12.5% checksums -checksum 392 1007 1008 - - +checksum 392 983 984 |