summaryrefslogtreecommitdiff
path: root/src/lib
diff options
context:
space:
mode:
authorKevin O'Connor <kevin@koconnor.net>2011-07-09 20:22:21 -0400
committerPatrick Georgi <patrick@georgi-clan.de>2011-07-12 11:36:20 +0200
commita68555f48d06b4c8d55f7e4ca208805bec3d5512 (patch)
tree132a21ab3f20d2ca5ce967705d4d92c3c0dbe476 /src/lib
parent537cacfa04c9dc56cd608012a73d95ab342d2f81 (diff)
Do full flush on uart8250 only at end of printk.
The previous code does a full flush of the uart after every character. Unfortunately, this can cause transmission delays on some serial ports. This patch changes the code so that it does a flush at the end of every printk instead of at the end of every character. This reduces the time it takes to transmit serial messages (up to 9% on my Asrock e350m1 board). It also makes the transmission time more consistent which is important when performing timing tests via serial transmissions. Change-Id: I6b28488b905da68c6d68d7c517cc743cde567d70 Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Reviewed-on: http://review.coreboot.org/90 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz> Reviewed-by: Sven Schnelle <svens@stackframe.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/uart8250.c5
-rw-r--r--src/lib/uart8250mem.c5
2 files changed, 8 insertions, 2 deletions
diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c
index 64e8854ef5..e7ddd0bfd5 100644
--- a/src/lib/uart8250.c
+++ b/src/lib/uart8250.c
@@ -48,7 +48,10 @@ void uart8250_tx_byte(unsigned base_port, unsigned char data)
{
uart8250_wait_to_tx_byte(base_port);
outb(data, base_port + UART_TBR);
- /* Make certain the data clears the fifos */
+}
+
+void uart8250_tx_flush(unsigned base_port)
+{
uart8250_wait_until_sent(base_port);
}
diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c
index 918308ecdf..e79cb63346 100644
--- a/src/lib/uart8250mem.c
+++ b/src/lib/uart8250mem.c
@@ -51,7 +51,10 @@ void uart8250_mem_tx_byte(unsigned base_port, unsigned char data)
{
uart8250_mem_wait_to_tx_byte(base_port);
write8(base_port + UART_TBR, data);
- /* Make certain the data clears the FIFOs */
+}
+
+void uart8250_mem_tx_flush(unsigned base_port)
+{
uart8250_mem_wait_until_sent(base_port);
}