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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2020-07-14 23:23:43 -0700
committerSubrata Banik <subrata.banik@intel.com>2020-07-20 03:59:46 +0000
commit9ea45ffb39f022207f8f5dc4640eb26164baf00b (patch)
tree5c85a67339f3a9eb3c205701f315813032f1b479 /src/lib
parent45d5f8f163898f943679129416b5c0d93c61c407 (diff)
vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3274
Update FSP headers for Tiger Lake platform generated based FSP version 3274. Compared to the current version 3197, v3274 adds most of the legacy UPDs in both FSPM and FSPS. BUG=b:159151231 BRANCH=none TEST=build and boot volteer proto2 Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: Id3f957aa9d9ad9710a3c930717c22f485699315e Reviewed-on: https://review.coreboot.org/c/coreboot/+/43473 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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