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authorJulius Werner <jwerner@chromium.org>2016-04-06 12:50:40 -0700
committerJulius Werner <jwerner@chromium.org>2016-04-07 20:46:38 +0200
commit2b6db9738ef6d09a068b65ef472c2d54f99abc37 (patch)
treeab43af5cac7b2d75fbb65705b2c43d1db0e45eca /src/lib
parent2268e0dc15d076c61792b97e954cad3f7c5f8c00 (diff)
edid: Make framebuffer row alignment configurable
Our EDID code had always been aligning the framebuffer's bytes_per_line (and x_resolution dependent on that) to 64. It turns out that this is a controller-dependent parameter that seems to only really be necessary for Intel chipsets, and commit 6911219cc (edid: Add helper function to calculate bits-per-pixel dependent values) probably actually broke this for some other controllers by applying the alignment too widely. This patch makes it explicitly configurable and depends the default on ARCH_X86 (which seems to be the simplest and least intrusive way to make it fit most cases for now... boards where this doesn't apply can still override it manually by calling edid_set_framebuffer_bits_per_pixel() again). Change-Id: I1c565a72826fc5ddfbb1ae4a5db5e9063b761455 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14267 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/edid.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 52898fbfa6..8bcb95630f 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -481,9 +481,14 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension,
out->mode.vborder = x[16];
/* We assume rgb888 (32 bits per pixel) framebuffers by default.
- * Chipsets that want something else will need to override this
- * with another call to edid_set_framebuffer_bits_per_pixel(). */
- edid_set_framebuffer_bits_per_pixel(out, 32);
+ * Chipsets that want something else will need to override this with
+ * another call to edid_set_framebuffer_bits_per_pixel(). As a cheap
+ * heuristic, assume that X86 systems require a 64-byte row alignment
+ * (since that seems to be true for most Intel chipsets). */
+ if (IS_ENABLED(CONFIG_ARCH_X86))
+ edid_set_framebuffer_bits_per_pixel(out, 32, 64);
+ else
+ edid_set_framebuffer_bits_per_pixel(out, 32, 0);
switch ((x[17] & 0x18) >> 3) {
case 0x00:
@@ -1524,14 +1529,16 @@ int decode_edid(unsigned char *edid, int size, struct edid *out)
*/
/* Set the framebuffer bits-per-pixel, recalculating all dependent values. */
-void edid_set_framebuffer_bits_per_pixel(struct edid *edid, int fb_bpp)
+void edid_set_framebuffer_bits_per_pixel(struct edid *edid, int fb_bpp,
+ int row_byte_alignment)
{
/* Caller should pass a supported value, everything else is BUG(). */
assert(fb_bpp == 32 || fb_bpp == 24 || fb_bpp == 16);
+ row_byte_alignment = max(row_byte_alignment, 1);
edid->framebuffer_bits_per_pixel = fb_bpp;
edid->bytes_per_line = ALIGN_UP(edid->mode.ha *
- div_round_up(fb_bpp, 8), 64);
+ div_round_up(fb_bpp, 8), row_byte_alignment);
edid->x_resolution = edid->bytes_per_line / (fb_bpp / 8);
edid->y_resolution = edid->mode.va;
}