diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-08-15 16:27:06 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-08-29 18:36:20 +0200 |
| commit | 8101aa6bb02c586cd0d1ab2cf99148329319aaf9 (patch) | |
| tree | 5609cabef4a330fa5438c74c749f763c39565693 /src/lib | |
| parent | 24100100181bd770ce0f1181a1770a0808790cde (diff) | |
usbdebug: Support choice of EHCI controller
Nowadays, chipsets or boards do not only have one USB port with the
capabilities of a debug port but several ones. Some of these ports are
easier accessible than others, so making them configurable is also necessary.
This change adds infrastructure to switch between EHCI controllers,
but does not implement it for any chipset.
Change-Id: I079643870104fbc64091a54e1bfd56ad24422c9f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3438
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/lib')
| -rw-r--r-- | src/lib/usbdebug.c | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index c9247881f0..a319da92b8 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -22,6 +22,7 @@ #include <console/console.h> #include <arch/io.h> #include <device/pci.h> +#include <device/pci_def.h> #include <arch/byteorder.h> #include <cpu/x86/car.h> #include <string.h> @@ -401,6 +402,20 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) return -1; //-ENOTCONN; } +#if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE +static void enable_usbdebug(void) +{ + pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX); + pci_ehci_dbg_enable(dbg_dev, CONFIG_EHCI_BAR); +} +#endif + +static void set_debug_port(unsigned int port) +{ + pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX); + pci_ehci_dbg_set_port(dbg_dev, port); +} + static int usbdebug_init_(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) { struct ehci_caps *ehci_caps; @@ -751,7 +766,9 @@ static void pci_ehci_set_resources(struct device *dev) void pci_ehci_read_resources(struct device *dev) { - if (!ehci_drv_ops) { + pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX); + + if (!ehci_drv_ops && pci_match_simple_dev(dev, dbg_dev)) { memcpy(&ehci_dbg_ops, dev->ops, sizeof(ehci_dbg_ops)); ehci_drv_ops = dev->ops; ehci_dbg_ops.set_resources = pci_ehci_set_resources; @@ -765,6 +782,17 @@ void pci_ehci_read_resources(struct device *dev) } #endif +unsigned long pci_ehci_base_regs(pci_devfn_t sdev) +{ +#ifdef __SIMPLE_DEVICE__ + unsigned long base = pci_read_config32(sdev, EHCI_BAR_INDEX) & ~0x0f; +#else + device_t dev = dev_find_slot(PCI_DEV2SEGBUS(sdev), PCI_DEV2DEVFN(sdev)); + unsigned long base = pci_read_config32(dev, EHCI_BAR_INDEX) & ~0x0f; +#endif + return base + HC_LENGTH(read32(base)); +} + int dbgp_ep_is_active(struct dbgp_pipe *pipe) { return (pipe->status & DBGP_EP_STATMASK) == (DBGP_EP_VALID | DBGP_EP_ENABLED); @@ -785,7 +813,7 @@ int usbdebug_init(void) struct ehci_debug_info *dbg_info = dbgp_ehci_info(); #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE - enable_usbdebug(0); + enable_usbdebug(); #endif return usbdebug_init_(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, dbg_info); } |